[SI-LIST] Re: DDR3 Ccomp capacitance delay
- From: "Hany Fahmy" <hanymhfahmy@xxxxxxxxxxxxxxxxxxx>
- To: <petebenjamin730@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Tue, 17 Dec 2013 18:19:27 +0100
Hi Pete,
Actually, it is not absolute length matching, it is prop-delay-matching,
pls. note that clock is deff signal with odd-mode propagation only, while
MA/CMD is both even/odd-modes. Also, pls. care about prop-delay in MS vs. SL
routing of the different sections of the fly-by.
We use the Cterm @ clock to smooth the signal-quality and better impedance
matching between lead-in to loaded-sections, but also u can use Cterm w
MA/CMD signals in case that ur driver is fast and strong, be careful that
MA/CMD & CNTL is very sensitive to drive-strength and output-SR.
Suggest to:
- use Cterm on both clocks and MA/CMD & CNTL
- have them both ref Vdd instead of GND to isolate them from SSO
noise of DQ switching
- prop-delay matching from the controller to each SDRAM-pin is
highly recommended especially if u don't have control over clock centering
inside MA/CMD eye and especially if u r running 1N mode instead of 2N mode
Hany Fahmy
CEO & Chief Consultant Officer
Intelligent Solutions BVBA
hanymhfahmy@xxxxxxxxxxxxxxxxxxx
http://www.intelligentsolutionsbvba.com/
http://www.linkedin.com/pub/hany-fahmy/66/852/b11
Phone: +32471650724
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Pete Benjamin
Sent: Tuesday, December 17, 2013 5:51 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DDR3 Ccomp capacitance delay
Hi Experts,
SODIMM and controller specifications I read all say to match (in time)
address/command nets to clock at DIMM input then at each dram input. It is
also recommended to add a 2.2pF to smooth the clock net but this cap delays
the clock net by around 50ps at first dram in the chain.
Can someone explain why do a perfect length matching when clock is then
shifted? that reduces margin for address timing. Am I missing something
here?
Some controllers don't even have capabilities to adjust clock timings.
Thanks,
Pete
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