Hi all expert,
I am doing the application test for ddr3 and ddr2 UDIMM module, but some
problem makes things confused:(two platform : INTEL, AMD, both have 4 module
slot )
For ddr2, it always hang up if 4 modules are pluged in together ,however it can
work if one of 4 modules is removed from the MB (3 modules works),
And what's strange is that such fail can't be improved by change of frequency,
VDD, Temperature...
But for DDR3, there is no such problems.
From my side, I think ,
maybe the odt resistance of ddr2 is not ok that makes signal weak at DRAM
interface when work for the full load(4 modues together),
and for ddr3, it can work because there is calibration for ODT, which can help
to adjust the signal quality.
But not sure about the rootcause,
It there some comments/explanation/advise from your experience?
Wait for reply.
Best Regards
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