[SI-LIST] Common-mode return loss in Hspice

  • From: "Jeon, Tae-Kwang" <Tae-Kwang.Jeon@xxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 26 May 2006 20:44:34 -0600

Hello all,
 

I'm trying to simulate common-mode return loss in hspice, and want to
double check my simulation with you because the result showed me was
somewhat different than what I expected over 100MHz ~ 10GHz.

First of all, below is my simple diagram implemented in the spice deck.

        

         Port1                                         Port2


            + -------[[[[[[[[[[[[[[[[[[[[[[[[[[[[[-------+

      +----+                 dif'l traces             +-------+

       |    +--------[[[[[[[[[[[[[[[[[[[[[[[[[[[[[-------+        |

    ((V))  common-mode                                /////

       |     input voltage source

     /////

 

Since I assume that both source impedance and the load impedance are
50ohms, I put 25ohms of Zcm to Rin and Rout variable as shown in the
input file below. So, here are my questions to ask.

 

1. Is my diagram is reasonable for scc11 measurement?

2. What impedance value should both Rin and Rout have in the .NET
statement. Is it Zo, Zeven or Zcm? If I set it to Zo(=50ohms), I have
6dB less loss than I expected. My W-elements model was based on dif'l
traces having roughly 70ohms of even mode impedance, which is Zcm =
Zeven/2 = 35ohms, although the odd mode impedance is ~53ohms.
Interestingly, If I set both Rin and Rout in .NET statement to
35ohms(=Zcm of trace), then it resulted in exactly what I expected. So I
want to clarify what is the right setting.

3. Is it right to use Sij(db) rather than either Sij(m) or Sij(r) for
the simple math like scc11=(s11+s21+s12+s22)/2?

 

*My spice deck

Vin vcm_in 0  AC=1

 

Xline1  vcm_in  vcm_in  vcm_out  vcm_out  0 trace1

 

Rdummy  vcm_out  0  1meg

 

.OPTIONS  accurate post=2  probe

.NET    v(vcm_out) Vin Rin=25  Rout=25

.AC     lin  1k  10meg  10000meg

.PROBE  scc11=par('(s11(db)+s21(db)+s12(db)+s22(db))/2')

 

.SUBCKT trace1  in1     in2     out1    out2    Vss

Wline1          in1     in2     Vss     out1    out2     Vss

+RLGCFILE= 'my_trace.rlc'    N=2 L=.049

.ENDS

.END

 

Thanks,

TK

 


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