[SI-LIST] Re: Cmos I/O & GTL I/O
- From: steve weir <weirsp@xxxxxxxxxx>
- To: Sunil Chandra KASANYAL <sunil-chandra.kasanyal@xxxxxx>
- Date: Mon, 17 Nov 2003 00:56:41 -0800
Sunil, instead of shouting, perhaps you would care to think through your
claim. Why do you believe that SS I/Os are not preferred for multi-drop
busses?
SS, multidrops:
1) Are not suitable as timing strobes.
2) Erode timing margin. How much depends entirely on the application and
topology.
The timing penalty ranges from almost nothing: when loads are clustered,
to significant: loads distribute from close to the driver to far away.
The extra time needed for the reflection to travel back to the nearest load
leads to an increased effective flight time of: Ttxline_furthest_load -
Ttxline_nearest_load.
That value sets both an increase in absolute delay, and reduction in the
common data valid window. If the resulting timing margin reduction is
acceptable, then SS multidrop gets the job done with advantages of its own
in terms of: simplicity, peak current draw, and / or reduced termination /
termination power supply real-estate.
Whether SS is suitable for a given multi-drop application or not depends on
the application. Rules declaring preferred and not preferred without
considering the circumstances are foolish at best.
Steve.
At 01:46 PM 11/17/2003 +0530, Sunil Chandra KASANYAL wrote:
>Steve, You are right but in general series terminated IOs are not
>PREFFERED for multi drop operation, because the receiver connected at
>the mid point of the Tx line will receive proper signal after one
>reflection at the end of the transmissin line. So, the total signal
>delay for the receiver at mid point= 1.5*(Tx line delay).
>
>steve weir wrote:
> >
> > Sunil, mostly.
> >
> > Source series terminations can be used with multi-drop busses. PCI is a
> > prominent, if somewhat ill-conceived example due to drivers mid bus.
> >
> > Regards,
> >
> > Steve.
> > At 01:19 PM 11/17/2003 +0530, Sunil Chandra KASANYAL wrote:
> > >Partha,
> > >
> > > 'Source terminated CMOS I/O' means the IO whose output
> impedance is
> > >equal to the transmission line impedance for matching at the source end.
> > >It is not necessary to keep the output buffer impedance equal to the
> > >trasmission line impedance, but the matching can be achieved by
> > >providing a resistance at source end. If your driver has perfact
> > >matching with transmission line than this architecture will be same as
> > >the series terminated case.
> > > GTL has the open drain architecture of output buffer having
> very high
> > >current sinking capability. GTL IO is terminated at the receiver end of
> > >the transmission line.
> > > In source terminated case, signals are terminated at source
> end after
> > >reflection at receiver end, but in case of GTL, signal is terminated at
> > >the end of the transmission line and no reflections will be there if
> > >termination is proper.
> > > CMOS IOs are generally used for lower frequency of operation
> which is
> > >about 50 to 60 MHz. GTL IOs are used for backplan operation where driver
> > >current capability is required very high (about 40mA).
> > > Also, source terminated IOs are not preferred for multidrop
> > > application
> > >but if termination is at the receiver end, IOs can be used for multidrop
> > >operations.
> > >
> > >Am I right ??
> > >
> > >Thanks and Regards,
> > >Sunil C Kasanyal
> > >
> > >
> > >-------------------------------------
> > >Hi all,
> > > What does it mean when one says 'Source Terminated
> > >CMOS I/O'? How is it different compared to GTL(Gunning
> > >Trancsiever Logic I/O) and what are their advantages &
> > >disadv when compared with each other?
> > >
> > >Thanks in Advance,
> > >
> > >Regards,
> > >Partha!
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>
>--
> ______________________________
> Sunil C Kasanyal
> STMicroelectronics Ltd.
> Noida INDIA
> Ph.No.:+91-120-2512021/30
> +91-120-2515262/64 Extn:6924
> ____________________________________________
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