[SI-LIST] Re: Capacitors and Anti-resonance
- From: "Paradis, Daniel" <Daniel.Paradis@xxxxxxxxxx>
- To: "'leeritchey@xxxxxxxxxxxxx'" <leeritchey@xxxxxxxxxxxxx>,si-list@xxxxxxxxxxxxx, "Paradis, Daniel" <Daniel.Paradis@xxxxxxxxxx>
- Date: Wed, 30 Jul 2003 13:32:40 -0400
Lee
Thanks for your feedback.
I will try to get the paper.
Do you have the URL ?
Who will be the publisher of your book?
I am always interested by the latest.
Regards
DP
-----Original Message-----
From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]
Sent: Wednesday, July 30, 2003 1:07 PM
To: si-list@xxxxxxxxxxxxx; Paradis, Daniel
Subject: RE: [SI-LIST] Re: Capacitors and Anti-resonance
Daniel,
There is a much better paper on this done by the engineers at University of
Missouri Rolla. It demonstrates that the location of capacitors of any
value makes little or no difference at the frequencies involved in edges of
that speed. Their self inductance renders them ineffective. The plane
capacitor you intentionally build into the PCB is the supplier of those
switching currents.
I have repeated those tests with a fellow engineer and demonstrated the
same thing. Our results will be published in my new book, "Right the First
Time, a Practical Handbook on High Speed Design'.
The UMR paper is: Hubing, Todd H. etal, "Power Bus Decoupling on
Multilayer Printed Circuit Boards" IEEE Transactions on Electromagnetic
Compatibility, Vol. 37, NO 2, May 1995.
Lee
Lee Ritchey
leeritchey@xxxxxxxxxxxxx
Why Wait? Move to EarthLink.
> [Original Message]
> From: Paradis, Daniel <Daniel.Paradis@xxxxxxxxxx>
> To: si-list@xxxxxxxxxxxxx <si-list@xxxxxxxxxxxxx>
> Date: 7/29/2003 4:55:42 PM
> Subject: [SI-LIST] Re: Capacitors and Anti-resonance
>
> Well I did my homework
> in "High-Speed Digital Design" by H. Johnson & M. Graham. (12th printing)
> It is said p. 260...
> " a rising edge of 1ns propagating in FR-4 material has a length of about
l=
> 6 in.
> No benefit will be derived in this example from a capacitor grid spaced
> further apart than l/12 = 0.5 inch"
>
> Now if I follow the same logic...
> for a 1 ns system I can use different values of caps for every sections >
if
> they are spaced apart by more than 0.5inch
> without risking any antiresonance effect.
>
> Does it make sense?
> Anybody?
>
>
> > -----Original Message-----
> > From: Paradis, Daniel
> > Sent: Tuesday, July 29, 2003 9:58 AM
> > To: 'si-list@xxxxxxxxxxxxx'
> > Subject: Capacitors and Anti-resonance
> >
> > I started to use only 0.1uF decoupling caps on our latest designs.
> > This is to avoid the anti-resonance effect that occurs when using 2
> > different caps near each other.
> > The rule of thumb is to use the largest cap available for the package. >
>
> > So far I got good results, but I was wondering....
> >
> > Is-there a simple way to determine the distance between 2 different
> > decoupling caps beyond which there is no anti-resonance effect?
> >
> > In other words..
> > Say that I stick to this general rule of using only one cap.
> > It seems to me that there could be exceptions to that rule.
> > In the case of a high speed clock buffer for instance;
> > I could need 0.0047uF instead of 0.1uF
> > If this clock buffer is located far from other parts of the design.
> > Can I avoid anti-resonance?
> >
> >
> > Daniel Paradis
> > Staff Electrical Engineer
> > Digital Subscriber Networks
> >
> > Scientific-Atlanta, Inc.
> > 5030 Sugarloaf Parkway, ATL 1.3468
> > Lawrenceville, GA 30042
> > Tel: (770) 236-7896
> > Fax: (770) 236-2449
> >
> >
>
>
> - - - - - - - Appended by Scientific-Atlanta, Inc. - - - - - - - >
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