[SI-LIST] Capacitance and excess propagation time of via

  • From: "Sogo Hsu" <sogo.hsu@xxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Tue, 23 Mar 2004 11:48:35 -0000

Hi, SI Gurus,

The capacitance of via was usually estimated by the formula as below

C =3D 1.41 epsilon_r * T * D1 / (D2 =A1VD1).

The definition of T is the total thickness of PCB by refering Dr. 
Johnson=A1=A6s black magic bible. It seems like that the formula implied 
the capacitance is formed by plate capacitor where the area is 
constructed by the conducted via body and space is (D2- D1)/2. Is it 
reasonable for a multi-layer PCB structure? In my opinion, the only 
effective thickness is the total thickness of pwr/gnd plane which 
the via passing through. Therefore, I think the estimation of 
capacitance is over-estimate. The full wave analysis results, such 
as HFSS, also presented the characteristic of via is inductive 
dominantly. That is said, via did not have such large capacitance 
inherently.

Besides, we also tried to estimate the excess propagation time when 
the signal traveling through via. Two cases are under consideration 
as below.
The test vehicle is a 4-layer PCB.

Case I.
(Top) =3D=3D=3D=3D=3D                                          
=3D=3D=3D=3D=3D=3D=3D=3D=3D       
         ||                                          ||
         ||                                          ||
         ||                                          ||
(Bottom)  
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Case II
(Top)=3D=3D=3D=3D=3D          
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D              
=3D=3D=3D=3D=3D=3D=3D=3D=3D       
        ||         ||                ||            ||
        ||         ||                ||            ||
        ||         ||                ||            ||
(Bottom)=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D                 
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

The total trace length is same to each other. The propagation time 
was measured by TDT. The excess propagation time caused by via can 
be obtained by subtracting with the propagation delay of microstrip 
in equal length. The excess propagation time per unit via for Case 
II is obviously faster in a factor of 60% than Case I as well. Does 
any one meet this phenomenon before? It is suspect that is the 
result of via coupling? I hope any expert can give me a reasonable 
explanation on this phenomenon. Thank you in advance. 

Sogo Hsu, Ph. D.
Foxconn Electronic



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