[SI-LIST] Re: CHGND connection in DVI connector
- From: qantrix <qantrix@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 4 May 2010 15:15:29 +0200
Steve,
http://img504.imageshack.us/i/currentdesign.png/
you can find current design. data(diff.pairs) shield connected to sgnd.
suggested design see here
http://img266.imageshack.us/i/suggested.png/
As you can see ch_gnd will cover all area of dvi connector and pins of
data pairs shield connected to ch_gnd.
diff.pairs will pass under separation between planes.
Idea make it like this seems like bad.
But it's possible to connect pairs shield to ch_gnd without creating
slot under pairs and cable will have only quite ch_gnd shield for each
pair and not dirty sgnd. Question is - does this shield carrying
return currents ? How it will work from EMC point ?
2010/5/4 steve weir <weirsi@xxxxxxxxxx>:
> Is there a reason you want to isolate signal common from chassis? Common
> practice is to join the two near the chassis boundary. If you attempt to
> isolate them, you will have lots of capacitive sneak paths. If they are
> joined you will not have a CM discontinuity issue.
>
> Steve.
>
> qantrix wrote:
>>
>> I have question about CHGND connection in DVI connector/cable.
>> There is two kind of shields - one - is shield for data/clock pair;
>> second - whole cable shield.
>> http://en.wikipedia.org/wiki/Digital_Visual_Interface
>>
>> We had some EMC consultation - was suggested to connect internal pairs
>> shield to chgnd.
>> on pcb make polygone chgnd that cover area up to end of dvi connector.
>> So diff.pairs will run under slot of gnd.separation.
>>
>> Question is - how should be connected internal shields in DVI
>> conenctor - to sgnd or to chgnd?
>>
>> diff. pairs running on the slot - seems like bad idea?
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>
>
> --
> Steve Weir
> IPBLOX, LLC 150 N. Center St. #211
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