[SI-LIST] Re: CHGND connection in DVI connector
- From: qantrix <qantrix@xxxxxxxxx>
- To: steve weir <weirsi@xxxxxxxxxx>
- Date: Sun, 9 May 2010 06:31:25 +0200
Steve,
Why it's a mistake? If you need to isolate, there is no other way,
only usage of caps.
With few caps you can keep connection impedance less than 0.5R in
interested frequency range - 25MHZ - 1GHZ
Charles,
>>> Also - I would NOT add the internal shields to the chassis ground at the
>>> I/O.
>>> This is an ideal way of letting EMI out and cause immunity problems.
can you give some theoretical explanation about "letting EMI out" ?
Do you think about return currents of diff.pair flowing on the shield
will pollute my chassis GND?
In EMC lab one of their experts said about technique when using full
plane for chassis_gnd. What you guys think about it?
2010/5/7 steve weir <weirsi@xxxxxxxxxx>:
> In the picture I sent you the entire solid red line is the join.
> I think trying to DC isolate common through DVI with capacitors is a
> mistake.
> Steve.
> qantrix wrote:
>>
>> OK. I understood. It will provide connection with lowest impedance.
>> H.Ott write about it in his book.
>> Did you connected it on all layers or outer only?
>> If i don't want DC flowing through my chassis - i need to connected it
>> to gnd in each point with few capacitors 10n, 1n, 100pf in parralel?
>>
>>
>> 2010/5/6 Grasso, Charles <Charles.Grasso@xxxxxxxxxxxx>:
>>
>>>
>>> We have several designs that are laid out just like Steve is
>>> recommending.
>>> Do not add moats where they are not needed.
>>>
>>> Also - I would NOT add the internal shields to the chassis ground at the
>>> I/O.
>>> This is an ideal way of letting EMI out and cause immunity problems.
>>>
>>> ________________________________________
>>> From: si-list-bounce@xxxxxxxxxxxxx [si-list-bounce@xxxxxxxxxxxxx] On
>>> Behalf Of steve weir [weirsi@xxxxxxxxxx]
>>> Sent: Tuesday, May 04, 2010 7:34 AM
>>> To: qantrix
>>> Cc: si-list@xxxxxxxxxxxxx
>>> Subject: [SI-LIST] Re: CHGND connection in DVI connector
>>>
>>> I disagree with the recommended design.
>>>
>>> I would connect signal and chassis grounds through a peninsula at the
>>> chassis side of the DVI connector. Depending on what else is going in
>>> and out of the box, bonding at other locations would also be
>>> appropriate. At a minimum you need to do it at the DVI connector. The
>>> basic premise is to reduce antenna efficiency and reduce energy pumped
>>> into the antenna. Big loops make for efficient antennas. Extending the
>>> chassis ground into the main PCB while still moating from signal ground
>>> is likely going to create coupling issues that will bite you, never mind
>>> the SI degradation you will get from crossing the moat.
>>>
>>> Much has been written on this area of interest. Doug Smith has a number
>>> of short articles and demonstrations showing how various grounding
>>> schemes work and fail.
>>>
>>> Steve.
>>> qantrix wrote:
>>>
>>>>
>>>> Steve,
>>>>
>>>> http://img504.imageshack.us/i/currentdesign.png/
>>>> you can find current design. data(diff.pairs) shield connected to sgnd.
>>>>
>>>> suggested design see here
>>>> http://img266.imageshack.us/i/suggested.png/
>>>>
>>>> As you can see ch_gnd will cover all area of dvi connector and pins of
>>>> data pairs shield connected to ch_gnd.
>>>> diff.pairs will pass under separation between planes.
>>>>
>>>> Idea make it like this seems like bad.
>>>>
>>>> But it's possible to connect pairs shield to ch_gnd without creating
>>>> slot under pairs and cable will have only quite ch_gnd shield for each
>>>> pair and not dirty sgnd. Question is - does this shield carrying
>>>> return currents ? How it will work from EMC point ?
>>>>
>>>>
>>>>
>>>> 2010/5/4 steve weir <weirsi@xxxxxxxxxx>:
>>>>
>>>>
>>>>>
>>>>> Is there a reason you want to isolate signal common from chassis?
>>>>> Common
>>>>> practice is to join the two near the chassis boundary. If you attempt
>>>>> to
>>>>> isolate them, you will have lots of capacitive sneak paths. If they
>>>>> are
>>>>> joined you will not have a CM discontinuity issue.
>>>>>
>>>>> Steve.
>>>>>
>>>>> qantrix wrote:
>>>>>
>>>>>
>>>>>>
>>>>>> I have question about CHGND connection in DVI connector/cable.
>>>>>> There is two kind of shields - one - is shield for data/clock pair;
>>>>>> second - whole cable shield.
>>>>>> http://en.wikipedia.org/wiki/Digital_Visual_Interface
>>>>>>
>>>>>> We had some EMC consultation - was suggested to connect internal pairs
>>>>>> shield to chgnd.
>>>>>> on pcb make polygone chgnd that cover area up to end of dvi connector.
>>>>>> So diff.pairs will run under slot of gnd.separation.
>>>>>>
>>>>>> Question is - how should be connected internal shields in DVI
>>>>>> conenctor - to sgnd or to chgnd?
>>>>>>
>>>>>> diff. pairs running on the slot - seems like bad idea?
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>>>>>>
>>>>>>
>>>>>
>>>>> --
>>>>> Steve Weir
>>>>> IPBLOX, LLC 150 N. Center St. #211
>>>>> Reno, NV 89501 www.ipblox.com
>>>>>
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>>>
>>> --
>>> Steve Weir
>>> IPBLOX, LLC
>>> 150 N. Center St. #211
>>> Reno, NV 89501
>>> www.ipblox.com
>>>
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>
>
> --
> Steve Weir
> IPBLOX, LLC 150 N. Center St. #211
> Reno, NV 89501 www.ipblox.com
>
> (775) 299-4236 Business
> (866) 675-4630 Toll-free
> (707) 780-1951 Fax
>
>
>
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