Zhangkun, the issue is what connects the capacitors to the IC. If it is traces the inductance will be very high, and that is not what I propose. A 4 mil board in FR-4 should come in at about 0.75 ohms. Regards, Steve. At 09:25 PM 8/27/2004 +0800, Zhangkun wrote: >Steve > >If the thickness of dielectric is about 4mil, the impedance of plane pair >could be about 5-10 ohm. With good fanout tech, the inductance could be >controlled below 0.5nH. By the way, carefully selecting decoupling >capacitor is also helpful. > >Best Regards > >Zhangkun >2004.8.27 >----- Original Message ----- >From: "steve weir" <weirsp@xxxxxxxxxx> >To: "Zhangkun" <zhang_kun@xxxxxxxxxx>; <istvan.novak@xxxxxxxxxxxxxxxx> >Cc: <si-list@xxxxxxxxxxxxx> >Sent: Friday, August 27, 2004 9:10 PM >Subject: Re: [SI-LIST] Re: Bypass vs Decoupling capacitors > > > > Zhangkun, are you talking about trace inductance as in: > > > > VRM => trace => decoupling => trace => loads > > > > OR > > > > VRM => trace => planar island w/ decoupling? > > > > I am talking about the second case. The first case has high impedance. > > > > Power plane SRF is a function of geometry and Er. The issue is what is > the > > relative cost and headaches to damp the planes making them into > > transmission lines, versus chopping them up. > > > > 100 ohms sounds quite high. We would be thinking in the low ohms or 100's > > of mohms. The difficult part is the attachment inductance. If I have a > > perfect resistor at 500mohms, but have to attach through 1nH of > inductance, > > then at 1GHz, the inductive reactance is more than 12 times the resistance > > and the phase will be about 85 degrees. Even using an IDC type structure > > we are not going to get close to the order of magnitude improvement needed. > > > > Now, the one thing that I have not given too much thought to is whether we > > can get away with inductive terminations if we remain resistive through > the > > first few harmonics of the board SRF. > > > > Regards, > > > > > > Steve. > > At 06:25 PM 8/27/2004 +0800, Zhangkun wrote: > > >istvan and steve > > > > > >I want to add some comments on this topic. > > > > > >1.The power delivery system, which uses traces not plane, will have some > > >defect for the leading inductance. We have done a lot of simulation about > > >the leading inductance of decoupling capacitor. When the trace is taken > > >placed by plane, the ESL gets less of about 6db. > > > > > >2.The resonance about power plane could be eliminated by means of some > > >effort. The frequency could be extended to about 1GHz or higher. However, > > >in some product PCB, there is no space for this kind of measures. The PCB > > >is too crowded. AVX has provided some high-ESR capacitor, whose ESR could > > >be as large as 100 ohm. > > > > > >3.Using trace for power delivery could be used for some special circuit > > >such as PLL. There are some paper in IEEE International Symposium on EMC > > >2003 on this topic. > > > > > >Best Regards > > > > > >Zhangkun > > >2004.8.27 > > > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu