[SI-LIST] Re: Bypass vs Decoupling capacitors

  • From: "Istvan NOVAK" <istvan.novak@xxxxxxxxxxxxxxxx>
  • To: <cpad@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>, "steve weir" <weirsp@xxxxxxxxxx>
  • Date: Thu, 26 Aug 2004 09:23:53 -0400

Steve,

I think we are in agreement on the basics.

BTW when I mentioned an example scenario of large board with
ASICs, I did not want to imply the necessity of thin and/or lossy
laminates at the same time.  That need has to be evaluated
separately, and may or may not be necessary.  My point was that
if we use an unsplit plane for power, we can safely route the
corresponding signals against this plane, with very minimnal routing
restriction.  If we split up the plane and create smaller islands, you
either have to sandwich it between ground planes (which drives up
layer count and price) or will have to live with potentially more
routing restrictions (which again may drive up layer count and price).
Putting the power islands onto single stripline signal layers, between
two ground planes, by filling areas not used by signal traces, creates
the least amount of restrictions, so this is the most convenient.  This,
however, depends on the trace density, and if trace density is too high,
we cannot do it.  If we put power islands on a signal layer of a dual
striple, it again crerates more routing restrictions.  In terms of routing
restrictions, power islands on the surface are the less demanding,
but potentially higher EMI radiation has to be considered.

Regarding royalty fees on patents, as you see, companies do differ
in their policies.

Regards,

Istvan Novak
SUN Microsystems


----- Original Message -----
From: "steve weir" <weirsp@xxxxxxxxxx>
To: "Istvan NOVAK" <istvan.novak@xxxxxxxxxxxxxxxx>; <cpad@xxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>
Sent: Wednesday, August 25, 2004 10:45 PM
Subject: Re: [SI-LIST] Re: Bypass vs Decoupling capacitors


> Istvan we have somewhat different points of view on this.  I appreciate
> that you are used to high-end computer equipment, and that may account for
> some of the difference in emphasis.  I am trying to live 15-20 minutes
into
> the future.  As the growth in electronics moves more and more to consumer,
> I am focused on siezing opportunity in the challenges that segment will
> present, and of course cost is paramount.
>
> But even if we take the example of a large, say 15" x 18" panel chock full
> of common I/O voltage and assume that the ASICs are so power hungry that
> multiple plane pairs must be used to feed power, and therefore the thin,
> lossy dielectric has to be purchased anyway, I think it is probably a
> suboptimal solution to try and use a single voltage node than divide and
> conquer.  Such an example begs the issue of I*R drop for such a large,
high
> current system.  If OTOH we divide that power distribution into smaller
> elements where insanely low resistance is not needed to avoid gobbling up
> the tolerance budget then we have lots of options including putting
> headroom to put back into the AC noise, which translates directly back
into
> real-estate due to the almost perfectly linear relationship between HF
> bypass impedance and bypass capacitor via count.  I just went through a
> similar exercise on a smaller scale with a client.  They allocated a
> disproportionate percentage of the error budget to DC, forcing a much
> larger and more expensive bypass network.
>
> In my never ending pitchman mode, I have developed some IP that I think is
> interesting in this area that allows for overall reduction of bulk and
> improved efficiency of the DC distribution system.  And it is predicated
on
> regional / POL regulation.
>
>  From my background prosecuting and defending patents, I assumed that all
> large companies make significant efforts to collect on patents.  I know
> that to retain the rights, they are required to prosecute
> licensing.  Licensing fees turns out to be about the only thing that made
> Harris' ( my old employer of years ago ) semiconductor division
> profitable.  Hitachi has gone so far as to buy up the portfolios of dead
> companies for defensive purposes.
>
> Regards,
>
>
> Steve.
>
> At 09:42 PM 8/25/2004 -0400, Istvan NOVAK wrote:
> >Steve,
> >
> >You make good points, but as always, it depends...
> >For instance, it is true that point of load converters
> >should not be connected to their load with a plane
> >larger than necessary, not only because larger planes
> >tend to resonate more severely, but also because if
> >the load is a high-speed core, the leakage of the clock
> >onto the PCB will create more EMI problems.  But
> >this is just one aspect in the complex design scenarios.
> >
> >However, there are situations when the large planes
> >are justified.  Imagine a large PCB filled with. for
> >instance. switch ASICs, all requiring the same IO
> >voltage.  All of these IO signals can rightfully reference
> >the IO plane, so it does not make much sense (though
> >one could do it) to feed the ASICs with small islands.
> >
> >A note about patents: I am not aware of anyone paying
> >SUN royalty fee on the PDN resonance-reduction
> >patents.  If you know of any such case, let me know.
> >Besides, other companies beyond Hitachi and SUN
> >also have granted patents on similar solutions.
> >
> >Regards,
> >
> >Istvan Novak
> >SUN MIcrosystems
> >
> >----- Original Message -----
> >From: "steve weir" <weirsp@xxxxxxxxxx>
> >To: <cpad@xxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> >Sent: Wednesday, August 25, 2004 5:43 PM
> >Subject: [SI-LIST] Re: Bypass vs Decoupling capacitors
> >
> >
> > > Chris,
> > >
> > > What I am saying is that we don't want signal current exciting the
> >cavities
> > > formed by the Vcc / Gnd planes.  So, we want to insert a series (
> > > decoupling ) impedance between the power distribution, ( even if it is
> > > planar ) and local Vcc islands for ICs.  The price that we pay for
this is
> > > that the decoupled Vcc planes are no longer suitable as signal image
> > > current returns which is precisely the point.  So just like "the old
> >days",
> > > early logic, or as Mike brought up vacuum tubes, we keep the signal
> > > currents out of the global power supply interconnect, and instead
restrict
> > > return images to ground.
> > >
> > > So, now the decoupled power islands need bypassed power across a
frequency
> > > range drops to that of what is needed to support PDS requirements,
rarely
> > > anything over 100MHz, because of the device package inductance.  That
is
> > > equivalent to a 3ns Tr, stuff we haven't seen since nearly 12 years
ago,
> > > when ironically, Rogers still made good money selling their bus-bar
> > > products for use on PCBs.  Given that more and more power is locally
> > > regulated, the existance of global Vcc planes is diminishing.  So more
and
> > > more we see the questions about crossing plane splits.  Former first
lady,
> > > and noted signal integrity expert Nancy Reagan declares "Just say
> > > no!"  Transport signal return images on ground planes as God
> > > intended.  Decoupling costs go through the floor, as do headaches
> > > associated with trying to calm resonant cavities being pumped at
> > > frequencies well above their SRFs and without paying Hitachi or Sun
money
> > > for their patents to try and make planes look like Tx lines.
> > >
> > > Regards,
> > >
> > >
> > > Steve.
> > > At 12:20 PM 8/25/2004 -0700, Chris Padilla wrote:
> > > >Steve,
> > > >
> > > >You've piqued my interest here since I'm an EMC guy.  Are you saying
that
> > > >because of low-impedance planes, we get too much energy sloshing
around
> >and
> > > >not getting absorbed so you like to put in some kind of R value in
some
> > > >fashion (expound here, please) to absorb that energy.
> > > >
> > > >Okay, I just read a lot into the below two paragraphs so set me
> > > >straight.  I'd like to understand better how I can use Rs in a
decoupling
> > > >network.
> > > >
> > > >Thanks----->Chris
> > > >
> > > > >The advent of low-impedance planes did away with the need for
series
> > > > >isolation in most digital circuits, so with the series element
gone,
> >all
> > > > >that was left of the decoupling network was the shunt capacitor on
the
> >load
> > > > >side which looks and acts like a bypass capacitor, because it is
one.
> >But
> > > > >the decoupling term got carried forward.
> > > > >
> > > > >Since, I am a fan of putting the series impedance back in
decoupling
> > > > >networks as a way to dramatically reduce cost and improve EMC
> >performance,
> > > > >I like to use  the terms the way they were 30 - 35 years ago.
> > > > >
> > > > >Regards,
> > > > >
> > > > >
> > > > >Steve.
> > > >
>
>

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