[SI-LIST] Re: Board design adjustments by manufacturers
- From: "Istvan Nagy" <buenos@xxxxxxxxxxx>
- To: <shlepnev@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 8 Sep 2014 18:32:51 -0700
Hi Yuriy,
You should talk to someone from one of the bigger American PCB fabs. They
are more likely to have "research" data like this.
Some designers let the fab to choose any parameter, while others require
official approval of all thicknesses and trace widths (like I do) and glass
styles even before prototyping or layout design.
So, instead of trying to get data about already built boards, you should
work with the hardware designers at an early stage to get the data, so they
can put the right numbers (width, spacing, thicknesses) into the design.
Then the PCB fab only does etching compensation, but not a big modification
on the trace widths.
They can provide the post-lamination thicknesses during the early stackup
negotiation between the HW engineer and the PCB Fab. Check how the Polar
Speedstack software works, and how it calculates post lamination
thicknesses. Some fabs have their own software.
Basically you should try to tackle this at the lead-in part of the project,
not at the tail-end. Then everything will be consistent.
There is always a push from management/purchasing to allow the FABs to do
whatever they want, and also some designers are only there to collect their
pay check so they couldn't care less about negotiating the exact stackup.
This way you end up with boards built with unknown parameters.
I wrote about these a few years ago:
http://www.buenos.extra.hu/download/accurate_impedance_control_pcdanf-magazine-2009nov-page20.pdf
Specifically about post-lamination thicknesses, etching compensation...
Regards,
Istvan Nagy
-----Original Message-----
From: Yuriy Shlepnev
Sent: Monday, September 08, 2014 1:48 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Board design adjustments by manufacturers
Hello Everyone,
After going through a multiple analysis to measurement validation projects,
I realized that almost all boards are not manufactured as designed (what a
surprise :-)). As a consequence the analysis to measurement validation may
require investigation of the manufactured board geometry, that includes
cutting the board and taking measurements on the cross-sections (usually
important only above 10 GHz). Now I am trying to figure out what board
design adjustments are needed and where to get those numbers without
cross-sectioning for the accurate post-layout electromagnetic analysis.
In particular, is there any way to get the following numbers without cutting
the board?
- change thickness of layers (account for plating and variations in
thickness of laminates);
- change trace width and shape (account for etching and plating);
- change spacing between traces in diff pairs (if adjusted for the
"impedance control");
How board manufacturers actually adjust trace widths or spacing for a given
design in the "impedance controlled" process if they have just Gerber or
ODB++ data? Is there any software that does it?
A relevant question - are there board manufacturers out there who provide
probability distribution data for stackup layer thicknesses, strip widths,
back-drilling depth etc.?
Can anybody point me to a source of information on this subject.
Best regards,
Yuriy
Yuriy Shlepnev, Ph.D.
President, Simberian Inc.
3030 S Torrey Pines Dr. Las Vegas, NV 89146, USA
Office +1-702-876-2882; Fax +1-702-482-7903
Cell +1-206-409-2368; Virtual +1-408-627-7706
Skype: shlepnev
www.simberian.com
Simbeor – Accurate, Fast, Easy and Affordable Electromagnetic Signal
Integrity Software
2010 and 2011 DesignVision Award Winner
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