[SI-LIST] Re: About the DDR2 Data Timing Budget Calculation
- From: steve weir <weirsi@xxxxxxxxxx>
- To: steam189759@xxxxxxxxxxx,<si-list@xxxxxxxxxxxxx>
- Date: Wed, 19 Apr 2006 02:16:11 -0700
Jeffrey, waveform asymmetry at the transmitter is=20
part of the transmitter skew budget. Asymmetric=20
response is part of the receiver budget. The=20
interconnect budget needs to include all ( and=20
only ) flight effects including push-out /=20
pull-in due to cross talk. Cross talk is=20
labelled XTK and budgeted at 55ps for data signal interconnects.
Steve.
At 01:57 AM 4/19/2006, YangJeffrey wrote:
>when I calculate the DDR2 data setup and hold=20
>margin, I use the formula(Write Case, have not=20
>included crosstalk and ISI effect):setup margin=20
>=3D Tsetup_controller_output - Tdata_delay_max + Tdqs_delay_min -=
Tsetup_receiver
>delay max is measured to the Vih(when rise)delay=20
>min is measured to the Vil(when rise)
>I think that the interconnect timing budget=20
>should include the skew measured between Vil and Vih.
>But in Micron document:Micron DDR2-533 Memory=20
>design guide for two-DIMM unbuffered systems,=20
>the DDR2 Write Budget is estimated in the table=20
>below:(You can also download it from=20
>website: http://download.micron.com/pdf/technotes/ddr2/tn_47_01.pdf)
>ELEMENT KEW=20
>COMPONENT SETUP HOLD=20
>UNITS Transmitter=20
>Total Skew at=20
>Transmitter 325 325 ps=20
>Clock Data/Strobe PLL=20
>jitter 25 25 ps=20
>DRAM=20
>device tDH/tDS 100=20
> 225 ps=20
> total=20
>Device 350 350 ps=20
>Interconnect XTK (cross talk) -=20
>DQ 55 55 ps=20
> XTK (cross talk) -=20
>DQS 40 40 ps=20
> ISI -=20
>DQ 30 30 ps=20
> ISI -=20
>DQS 5 5 ps=20
> Input Capacitance=20
>Matching 25 25 ps=20
>REFF=20
>Mismatch 10 10 ps=20
> Input Eye Reduction=20
>(VREF) 25 25 ps Path=20
>Matching (Board) 25 25 ps
> Path Matching=20
> (Module) 10 10 ps Total=20
> Interconnect Interconnect=20
> Skew 225 225 psTotal=20
> Budget 1875/2 @ 533=20
> MHz 937.5 937.5 psTotal Budget=20
> Consumed by Controller and DRAM Transmitter=20
> + DRAM + Interconnect 925 925=20
> psInterconnect=20
> Budget=20
> Total-(Transmitter + DRAM=20
> + Interconnect) 12.5 12.5=20
> ps It seemed that the=20
> interconnect budget data in the table do not=20
> include the skew caused by Vil and Vih. If=20
> considering the skew caused by Vil and Vih, the=20
> interconnect budget will be negative.Can the=20
> skew caused by Vil and Vih be ignored orit has=20
> been included in the the total interconnect=20
> skew in the table? Thanks,Jeffrey Yang
>_________________________________________________________________
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