[SI-LIST] AW: Re: PCB via simulations

  • From: "Thomas Beneken" <beneken@xxxxxxxxxxxx>
  • To: <DSWANSON@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 1 Apr 2002 17:35:51 +0200

Hi Dan,

You are perfectly right:

a) The coupling capacitor between power plane and ground plane near the v=
ia
is missing.
b) The perfectly conducting boundary box must be dragged away far enough
from the ends of the TL not to influence the ports.
c) Free space approximation for the boundary is even better. (but the
Algorithm is more complicated and calculation time increases)

Thank You

Thomas

-----Urspr=FCngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]Im Auftrag von Dan Swanson
Gesendet: Montag, 1. April 2002 16:26
An: 'beneken@xxxxxxxxxxxx'; Dan Swanson; si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Re: PCB via simulations




Hi Thomas,

If trace 1 is referenced to the power plane,
and trace 2 is referenced to the ground plane,
this is even worse. In the real board, the only
way for RF return current to get between the two
is capacitive coupling between the planes or
discrete RF bypass caps on the board, near the
transition.

If you take this same geometry and run it on
an em code who's fundamental formulation is
laterally open (no box walls) like Zeland IE3D
or Agilent Momentum, you will get a radically
different answer above 1 or 2 GHz. (Return loss
(reflections) will be much worse.)

If you take Kevin's model and pull the power
and ground planes away from the box walls on two
sides, you will get a different answer, which is heading
towards the right answer.

As always, depends on freq range, etc that you are interested
in.

Dan


-----Original Message-----
From: Thomas Beneken [mailto:beneken@xxxxxxxxxxxx]
Sent: Monday, April 01, 2002 9:00 AM
To: DSWANSON@xxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: AW: [SI-LIST] Re: PCB via simulations=3D20


Hi Dan,

ok, simulators need a restricted calculation volume, because mems =3D
resources
are restricted too. One can select a perfect conducting box or a free =3D
space
boundary box. You may want the box far enough from your objects of =3D
interest.
(This is the week point in Kevins setup: really far enough?)

I don't want to defend Kevins paper, but I've seen power planes in his
model. This is his layer stack:

18.5 mils      -------------------------------- perfect conducting =3D
boundary
box
               |p1            via             |
13 - 13.5 mils |->-------------|              | trace 1
11 - 11.5 mils --------------- | -------------| power plane
               |                              |
 7 -  7.5 mils --------------- | -------------| ground plane
 5 -  5.5 mils |               |------------<-| trace 2
               |                            p2|
 0             -------------------------------| perfect conducting =3D
boundary
box

He defined discrete ports between the ends of the traces and where the
planes meet the bounding box ("currents wrap around"). Looks quite ok =3D
for
me. Dan, please have a second look and correct me if I'm wrong. I admit =3D
a
wider bounding box would be better (I do have a Gigabyte-RAM =3D
workstation).

Regards, Thomas

-----Urspr=3DFCngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]Im Auftrag von Dan Swanson
Gesendet: Montag, 1. April 2002 14:44
An: 'beneken@xxxxxxxxxxxx'; si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Re: PCB via simulations



It looks like the boundaries of the
simulation space are perfectly conducting
walls. They might also be some kind of
low impedance absorbing boundaries.

In either case, there is no path for return
current in this model, other than the walls
of the simulator. This is a common mistake
is em simulation of multilayer transitions.
The results will be overly optimistic. In a real
board, the return path will typically be some
random combination of ground vias near this
signal via.

Dan

Dan Swanson             EMAIL:  d.swanson@xxxxxxxx
Forem USA                       PHONE:          978-834-4085
37 South Hunt Road      FAX:    978-388-7077
Amesbury, MA  01913


-----Original Message-----
From: Thomas Beneken [mailto:beneken@xxxxxxxxxxxx]
Sent: Monday, April 01, 2002 7:10 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PCB via simulations


Hi All,

I ran across PCB via simulations by Kevin Thomas of Cray Inc., =3D
September
1997. Updated March 2001.
http://lc.cray.com/apps/xvia/

hope it's useful for someone, (lost that thread ...)

Thomas


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