[SI-LIST] Re: AW: AW: AW: PCI Express differential impedance
- From: Chris Cheng <Chris.Cheng@xxxxxxxx>
- To: steve weir <weirsi@xxxxxxxxxx>, "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
- Date: Mon, 18 Oct 2010 18:47:52 -0700
Steve,Jeff and Gert,
The original question was asking for PCIe gen I at 2.5Gb/s.
Does any of these effects matter at that speed ?
Regards,
Chris Cheng
Distinguished Technologist
3PAR- an HP Company
HP StorageWorks Division
www.hp.com
www.3PAR.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of steve weir
Sent: Monday, October 18, 2010 12:26 PM
To: Havermann, Gert
Cc: Loyer, Jeff; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: AW: AW: AW: PCI Express differential impedance
Gert, I'll go pull that particular paper, but from what I have seen so
far the conclusion wrt tight coupling doesn't seem to follow. It has
been demonstrated before that as that paper noted asymmetry wrt glass
density in proximity of one trace versus another can cause several
problems, skew being the the first, and perhaps most severe. In
addition to techniques such as rotating traces off the weave and warp
axes, one of the more effective ways of reducing weave induced skew is
to set track pitch to match weave / warp pitch. For common dielectric
thicknesses and edge coupled traces, this results in loose coupling.
Best Regards,
Steve.
Havermann, Gert wrote:
> Steve,
>
> I can't share the my data since it was generated in a cooperation with a
> large TEM.
> But there has been a nice DesignCon Paper about Glass weave Simulations in
> 2009:
> "Bounding the effect of Glass Weave through Simulation"
> By Ansoft, Verizon and University of Washington.
>
> They were focussing on different prepreg types and simulation, but when you
> examin Figure 11 and Figure 14 and read the Skew chapter, then they are
> basically coming to the same conclusion. They found most of the skew and mode
> conversion when one of the traces of a diff pair was routed above a glass
> bundle (and of corse the coarse glass performed worse). If you scale their
> traces down to 4mil traces you will see this effect even with dense weave
> (like 2116).
>
> All the technicques used to mitigate skew (like angle routing) will help, but
> if you use loose coupling (0%) you will still have more areas with non
> symmetrical glass load than with tight coupling (this is even true for
> periodic loading of different strength).
>
> I share your conclusion that dumping glass/resin is the best conclusion. But
> you know about cost pressure...
>
> BR
> Gert
>
>
>
> --------------------------------------------------------------------------
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> -----Ursprüngliche Nachricht-----
>
> Von: steve weir [mailto:weirsi@xxxxxxxxxx]
> Gesendet: Montag, 18. Oktober 2010 12:12
> An: Havermann, Gert
> Cc: Loyer, Jeff; si-list@xxxxxxxxxxxxx
> Betreff: Re: [SI-LIST] AW: AW: PCI Express differential impedance
>
> Gert, it would be interesting to go over the data that leads you to your
> conclusion that tight differential pair coupling mitigates glass weave
> effects. My experience has been just the opposite. In general it seems that
> loose coupling within reasonable limits offers fewer dependencies
> on the board geometries, including glass weave. Most of the routing
> techniques directed at mitigating weave effects either attempt to average
> delta dK*length variations, and/or minimize them. In order for tight
> coupling to make a substantial improvement it has to do one or
> both: Place each trace in close proximity to the same glass features.
> Present geometries do not lend themselves to that. Or, couple enough energy
> trace to trace to substantially reduce image plane coupling.
> Geometries required for common impedances with typical stack-ups, and
> commonly used glass geometries do not generally lend themselves to those
> circumstances. Ultimately, at high enough speeds, the real answer is to dump
> glass/resin for homogenous dielectric.
>
> Best Regards,
>
>
> Steve.
>
> Havermann, Gert wrote:
>
>> Jeff, Scott,
>>
>> sorry for not beeing accurate enough (the weekend was just too close), and
>> thank you Scott for your detailed explanation.
>>
>> There is another glass weave effect besides the pure differential impedance
>> variation that I fear even more, and thats unbalanced impedance variations,
>> meaning one trace of the differential pair has another impedance than the
>> other. This can happen when loose coupling is used, and one trace is closer
>> to a glass bundle than the other. This then effects the common modes as it
>> introduces local skew to the signal (with all the well known problems this
>> can cause). even if this may not be problematic for PCI-E speeds, it is for
>> speeds exceeding 10G.
>>
>> BR
>> Gert
>>
>>
>> ----------------------------------------------------------------------
>> ---- Absender ist HARTING Electronics GmbH & Co. KG; Sitz der
>> Gesellschaft: Espelkamp; Registergericht: Bad Oeynhausen;
>> Register-Nr.: HRA 5596; persönlich haftende Gesellschafterin: HARTING
>> Electronics Management GmbH; Sitz der Komplementär-GmbH: Espelkamp;
>> Registergericht der Komplementär-GmbH: Bad Oeynhausen; Register-Nr.
>> der Komplementär-GmbH: HRB 8808; Geschäftsführer: Torsten Ratzmann
>> -----Ursprüngliche Nachricht-----
>>
>> Von: Loyer, Jeff [mailto:jeff.loyer@xxxxxxxxx]
>> Gesendet: Freitag, 15. Oktober 2010 16:51
>> An: Havermann, Gert; si-list@xxxxxxxxxxxxx
>> Betreff: RE: [SI-LIST] AW: PCI Express differential impedance
>>
>> Can you provide some clarification or data on the statement below? It
>> doesn't match my experience.
>>
>> "My experience is, that the stronger the coupling, the lower the glass weave
>> effect."
>>
>> Thanks,
>> Jeff Loyer
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
>> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Havermann, Gert
>> Sent: Thursday, October 14, 2010 11:50 PM
>> To: kelvin.harding@xxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] AW: PCI Express differential impedance
>>
>> Hi Kelvin,
>>
>> the single ended impedance isn't most important. The differential driver
>> only sees the differential impedance. The Single ended impedance may have
>> some impact on the common modes (if the impact is good or bad depends on the
>> ammount of reflections and losses in your system). Which single ended
>> impedance is best has been discussed on this reflector several times, but in
>> the end it seems to be a matter of faith. My experience is, that the
>> stronger the coupling, the higher the manufacturing impedance tolerances,
>> and the lower the glass weave effect. I'd start with a 10% coupling
>> (meaning, the se- impedance is 10% higher than the half of the differential
>> impedance).
>>
>> 100R d-imp traces for a gen2 PCI-Express link will add losses (approx. 2dB @
>> 5GHz) and reflections (approx. 5dB from 0.5 to 5GHz). If your channel is
>> already challanging, make a quick w-element, hyperlynx (or similar)
>> simulation to find out if 100R fits for your application.
>>
>> BR
>> Gert
>>
>>
>> ----------------------------------------------------------------------
>> ---- Absender ist HARTING Electronics GmbH & Co. KG; Sitz der
>> Gesellschaft: Espelkamp; Registergericht: Bad Oeynhausen;
>> Register-Nr.: HRA 5596; persönlich haftende Gesellschafterin: HARTING
>> Electronics Management GmbH; Sitz der Komplementär-GmbH: Espelkamp;
>> Registergericht der Komplementär-GmbH: Bad Oeynhausen; Register-Nr.
>> der Komplementär-GmbH: HRB 8808; Geschäftsführer: Torsten Ratzmann
>> -----Ursprüngliche Nachricht-----
>>
>> Von: si-list-bounce@xxxxxxxxxxxxx
>> [mailto:si-list-bounce@xxxxxxxxxxxxx] Im Auftrag von
>> kelvin.harding@xxxxxxxxxxxxxxx
>> Gesendet: Donnerstag, 14. Oktober 2010 23:42
>> An: si-list@xxxxxxxxxxxxx
>> Betreff: [SI-LIST] PCI Express differential impedance
>>
>> The Virtex data sheet states the PCI Express traces should have a target
>> differential impedance of 100R for rev 1 and 85R for rev 2 but gives no
>> requirement for a single ended impedance. I have PCIe rev 1 designs working
>> that we designed with 50R single ended and 100R diff but i thought the most
>> important impedance was the single ended. What would be the effect of a 100R
>> diff impedance on a 5G PCIe signal?
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>
>
> --
> Steve Weir
> IPBLOX, LLC
> 150 N. Center St. #211
> Reno, NV 89501
> www.ipblox.com
>
> (775) 299-4236 Business
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