Hi, I'm running some HSPICE simulation on a AC-coupled diff pair @2.5Gbps. One problem I have is to deal with the RC constant effect due to the series capacitance. If I reduce the capacitance value, the settling time gets shorter but I also distort the signal significantly since the cap act as a high pass filter. But if I use the designed capacitance, the simulation running time gets unrealistically long to allow the waveform to settle. Wonder whether any of you can share your thoughts/experience on this. Thanks Perry -- Perry Qu Design & Qualification | 600 March Road Alcatel Canada | Ottawa, ON K2K 2E6, Canada DID: (613) 7846720 | FAX: (613) 5993642 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu