[SI-LIST] Re: AC Coupling Capacitors for LVPECL Signals
- From: "Ingraham, Andrew" <Andrew.Ingraham@xxxxxx>
- To: "si-list" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 15 Oct 2002 21:47:58 -0400
> Choose a capacitor which don't have its first parallel resonance at
> your
> fundamental (or clock) frequency.
You might want to take it a step further, and make sure a resonance
doesn't land on or near the first few harmonics, especially if clock
skew is a parameter you need to control.
Having a resonance near a harmonic (or the fundamental) could cause a
phase shift or clock skew that varies from one sample to another.
Parallelling capacitors with different values may seem at first like a
good way to broaden the frequency response, but it also increases the
chances of having a parallel resonance where you don't want it.
And always keep in mind that the resonances of a capacitor depend as
much (if not more) on board layout, as on the capacitor itself.
Regards,
Andy
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