[SI-LIST] Re: 100nF AC coupling caps
- From: Carson Au <carson.au@xxxxxxxxx>
- To: Scott McMorrow <scott@xxxxxxxxxxxxx>
- Date: Thu, 8 Jan 2015 22:58:37 +1100
Hi Scott,
I do not doubt that impedance compensation of the pad will improve channel
margins. However, compensating for this is not quite free margin - there is
considerable difficulty in implementing this on lower end EDA tools (let
alone working out the appropriate compensation using a 3D field solver
tool). The ground copper removal could also disturb the return path of
signals on the opposite side of this plane.
I guess my question is - when is pad compensation critical? What does it
depend on?
For example, a typical pad on an 0402 component could be 0.6mm in length.
Wavelength of the nyquist frequency of a 10Gb channel on a PCB would be
approximately 33.4mm (200ps/6ps/mm) (I acknowledge that higher frequency
content would exist, but this is just a quick estimation). Is the impedance
discontinuity of 0.6mm in comparison to the nyquist wavelength
insignificant?
Regards,
Carson
On Thu, Jan 8, 2015 at 10:38 PM, Scott McMorrow <scott@xxxxxxxxxxxxx> wrote:
> Carson
>
> I'm not sure what you are asking. We can certainly document that
> compensation of capacitor transitions improves performance in Serdes
> channels. That is not up for debate any more than tight impedance control
> is. Whether there is a specific design study that says a system failed due
> to just a cap ... who knows. Systems fail for all sorts of reasons, and
> most of those reasons are the interaction between reflections across
> multiple components. Optimization is free margin. Once done, the margin
> is always there and costs nothing to implement. Optimization of structures
> always provides better system performance.
>
> regards
>
> Scott
>
>
>
>
>
>
> Scott McMorrow
> Consultant - R&D
> 16 Stormy Brook Rd
> Falmouth, ME 04105
> (401) 284-1827 Business
> http://www.teraspeed.com
>
> On Thu, Jan 8, 2015 at 6:30 AM, Carson Au <carson.au@xxxxxxxxx> wrote:
>
>> Are there studies/papers on the practical effect of not compensating for
>> the pad impedance in SERDES channel design? Has there been any documented
>> channel failures due to not compensating for these pad impedances?
>>
>> On Thu, Jan 8, 2015 at 9:53 PM, Zheng Edison <edisonzheng@xxxxxxxx>
>> wrote:
>>
>>> Hi,experts
>>> What is the difference between using 100nf caps and using 200nf caps(or
>>> some other values) in serdes links?thanks.
>>> HW
>>> edison
>>>
>>> --- Original Message ---
>>>
>>> From: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
>>> Sent: January 8, 2015 6:20 AM
>>> To: bbakshan@xxxxxxxxx
>>> Cc: andrew@xxxxxxxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
>>> Subject: [SI-LIST] Re: 100nF AC coupling caps
>>>
>>> All,
>>> For an 0402 capacitor, use pretty much any MLCC and you will be fine. In
>>> the configuration that a DC blocking capacitor is used, the important
>>> criteria is distance from the PCB to the lowest plate in the capacitor.
>>> An
>>> 0402 DC blocking capacitor in a differential configuration can be
>>> designed
>>> to be mounted on a PCB and have a return loss of better than -35 dB out
>>> to
>>> 12.5 GHz. Such a capacitor has essentially flat response. I just
>>> designed
>>> such a transition last week, and modeled the pcb, traces, pads,planes,
>>> full
>>> body of the capacitor and all of it's plates. Having done this a few
>>> times
>>> in the past, I can tell you that an 0201 capacitor can be designed to
>>> have
>>> about twice the bandwidth, and would definitely work up to 56 Gbps NRZ.
>>>
>>> For guardband against Murphy, I will run 0402 capacitors up to 16 Gbps,
>>> and
>>> switch to 0201 capacitor for 25+ Gbps designs.
>>>
>>> As a first approximation, in a board with two planes directly underneath
>>> the capacitors, make those two planes ground in the vicinity of the
>>> capacitors, stitch them with vias, and place a hole in the plane adjacent
>>> to the capacitor that extends under both pads. This will provide some
>>> amount of compensation, and get you to around -15 dB return loss out to
>>> 10
>>> GHz.
>>>
>>> best regards,
>>>
>>> Scott
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>> Scott McMorrow
>>> Consultant - R&D
>>> 16 Stormy Brook Rd
>>> Falmouth, ME 04105
>>> (401) 284-1827 Business
>>> http://www.teraspeed.com
>>>
>>> On Wed, Jan 7, 2015 at 4:53 PM, Boris Bakshan <bbakshan@xxxxxxxxx>
>>> wrote:
>>>
>>> > Hi Andrew,
>>> > For high rate signaling it won't matter that much if you choose 0201
>>> caps
>>> > over 0402.
>>> > For 0201, the ESL of just the capacitor alone (excluding the artifacts
>>> > associated with the mounting on a PCB) is in the order of 400pH.
>>> > For shape of 0402, it is ~550pH.
>>> > Remember that the impedance of the bulk capacitance and the series
>>> > resistance (ESR) are negligible when it comes to high speed signaling.
>>> > Furthermore, you will not benefit from reducing the package but instead
>>> > what you should be doing is reducing the parasitic-shunt capacitance
>>> of the
>>> > 0402 structure (shape a void area in the plane underneath) and target
>>> the
>>> > effective impedance to match your transmission line.
>>> >
>>> > Hope it helped..
>>> > Boris Bakshan.
>>> >
>>> >
>>> > On Wed, Jan 7, 2015 at 8:32 PM, Andrew Holme <
>>> andrew@xxxxxxxxxxxxxxxxxx>
>>> > wrote:
>>> >
>>> > > Can anyone recommend by manufacturer's part number an 0402 size
>>> 100nF AC
>>> > > coupling capacitor for use in a DisplayPort Main Link at 5.4 Gbps?
>>> Many
>>> > > 0402 size 100nF caps have self-resonant frequencies in the tens of
>>> MHz
>>> > > range. We would consider 0201 devices but shy away from 01005. The
>>> VESA
>>> > > spec says min 70 nF to max 265 nF is the allowable range of values
>>> for AC
>>> > > coupling caps in the main link. I presume such large values are
>>> required
>>> > > because of DC wander?
>>> > >
>>> > > TIA
>>> > > Andrew.
>>> > >
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>>
>
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