Ok, the beginnings of Vector Instruction changes:
vbitplanes <- vmask (thanks Pascal!)vclip <- vclampvsignasl <- vsaslvsignasls
<- vsaslsvshl <- vlslvshsls <- vasls (must have been a bug in the original
list)vsign <- vsgnvcount <- vcnt/vpopcntvtestmag <- vcmpgevbitrev <- vbrev
(note different than scalar that now uses brev rather than bitrev).
(These are based on matching source code against the binary blob).
Todo:- all those pesky muliply forms- all those memory access forms- add DB's
clamps / clips (op30)- merge DB's wiki changes.
I've found an added complexity, related to either pseudo instructions or that
16/32 bit size thingy. eg. vto32l <-> v16interl vto32h <-> v16interh
from32h <-> v16even from32l <-> v16odd
But the inter and even/odd forms are used elsewhere.
/HHFrom: hermanhermitage@xxxxxxxxxxx
To: raspi-internals@xxxxxxxxxxxxx
Subject: [raspi-internals] Re: VPU mnemonic alignment
Date: Sat, 28 May 2016 22:59:14 +1200
...
Doing the vector instruction alignment now, but this is a piece of work...
