I believe I matched most of the usages between the source and the corresponding
instruction in the start<>.elf binaries.What I generally tried to do was find
the compiled function in start.elf and compare the instructions against the
source.
I see bitflip as more concrete than bchg. "Bit change" doesnt say how the
change happens, but flipping a bit is like flipping a switch, I think it has
cleaner intent. Still 6 of one... half a dozen of the other... its completely
arbitrary.
Also bitrev became brev to match the source. In bitflip, bit means a single
bit, then in brev, "b" means all the bits. Don't shoot the messenger, just
aligning with the sources :-)(bmask and signext kill me for extu/exts, and dont
get me started on shl instead of lsl, definitely making me feel queasy...:).
I also changed 'mov rd, cpuid', to 'version rd' to match the source, but failed
to mention it (because it began with "v" it got filtered out by my "thats a
vector instruction"...)
I'm confident the scalar are now pretty close to accurate, until we find out
otherwise :)
I haven't quite worked out the real name for all the special registers r24-r31.
They can be seen at
http://web.archive.org/web/20030915135553/http://www.arc.com/downloads/success_stories/C12260_Alphamosiac.pdf
if you look at the debugger screenshot. But I suspect someone will need a
pair of those Xray specs they used to sell in american comics (alongside the
sea monkeys) to see it clearly. You can make out "sp", "lr", "sr" and "pc"
pretty clearly.
I believe r24 is 'gp' (global pointer? to the global data block).I believe r29
is 'cp' or 'tp' (core pointer / thread pointer, based on usage in start.elf
points to a per core data block).
I'd guess r28 is '_sp' fill in the blank for _ ? maybe s?r27 not sure, but its
another three letter name.
Any ideas?
Doing the vector instruction alignment now, but this is a piece of work...
H.
Date: Sat, 28 May 2016 11:02:59 +0100
Subject: [raspi-internals] Re: VPU mnemonic alignment
From: julianbrown99@xxxxxxxxx
To: raspi-internals@xxxxxxxxxxxxx
On 26 May 2016 at 00:48, Herman Hermitage <hermanhermitage@xxxxxxxxxxx> wrote:
bhg: (alias) bchg *bitflip
I'm a bit puzzled about these -- changing bchg to bitflip means we have both
bitflip and bitrev, which seem like they might be the same operation (reversing
the order of bits in a register). My guess would be:
* bitrev (opcode 29) should be bitflip.* bchg (opcode 18) should be ??? (the BC
.s files don't use it).
Perhaps "bchg" is endian conversion, i.e. reversing the order of *bytes* in a
register?
OTOH, there's a vector vbitrev instruction (i.e. not vbitflip), just to confuse
matters further.
Thanks,
Julian
