The padstack editor has a option for internal suppression of unused padstacks. Jerry -----Original Message----- From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Gennadiy Kiryukhin Sent: Thursday, September 09, 2010 1:03 PM To: icu-pcb-forum@xxxxxxxxxxxxx Subject: [PCB_FORUM] Re: Suppressing pads Red is top layer. Pink is internal layer. I need to suppress pads on internal layers. On 9/9/2010 12:40 PM, Schwartz, Jerome wrote: > Hope some of you are seeing the issue I am. These are outer layer vias. > > You can't suppress them and expect the vias to be plated through. > > I would make them blind vias since the outer layers are foil laminated. > > Jerry > > *From:* icu-pcb-forum-bounce@xxxxxxxxxxxxx > [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] *On Behalf Of *Mark > Yamashita (mayamash) > *Sent:* Thursday, September 09, 2010 12:31 PM > *To:* icu-pcb-forum@xxxxxxxxxxxxx > *Subject:* [PCB_FORUM] Re: Suppressing pads > > Gennadiy, > > This is in your artwork set up. Manufacture => artwork => select your > layer. This is in the allegro expert. > > Mark > > -----Original Message----- > From: icu-pcb-forum-bounce@xxxxxxxxxxxxx > [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Gennadiy Kiryukhin > Sent: Thursday, September 09, 2010 9:06 AM > To: icu-pcb-forum@xxxxxxxxxxxxx > Subject: [PCB_FORUM] Re: Suppressing pads > > Under Setup I have: Drawing Size, Drawing Options, Text Size, Grids, > > Subclasses, Define BB Via, Constraints, Property Definitions, Define > > Lists, Areas, Outlines, and User Prefs. > > Is it specific to a certain version/license? > > CHRIS LANZA wrote: > > > Under setup there is pad suppression. You suppress vias also > > > > > > -----Original Message----- > > > From: icu-pcb-forum-bounce@xxxxxxxxxxxxx > > > [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Gennadiy > > > Kiryukhin > > > Sent: Thursday, September 09, 2010 10:47 AM > > > To: icu-pcb-forum@xxxxxxxxxxxxx > > > Subject: [PCB_FORUM] Suppressing pads > > > > > > I have a BGA with ground plane under it. The problem I have is that the > > > ball pitch is too small to create a single ground (power)plane under it > > > with all the via pads unsuppressed. See picture attached. Instead of > > > having one GND plane I have small islands. Is there any way to suppress > > > pads on vias that don't have connections on that plane so that I have > > > more room to create a single GND plane? > > > > > > Thank you. > > > > > -- > > Gennadiy Kiryukhin > > Development Engineer > > ATSI > > 8157 US Route 50 > > Athens, OH 45701 > > Phone: (740) 592-2874 > > Fax (740) 594-2875 > > ----------------------------------------------------------- > > To subscribe/unsubscribe: > > Send a message to icu-pcb-forum-request@xxxxxxxxxxxxx > > with a subject of subscribe or unsubscribe > > To view the archives of this list go to > //www.freelists.org/archives/icu-pcb-forum/ > > Problems or Questions: > > Send an email to icu-pcb-forum-admins@xxxxxxxxxxxxx > > ----------------------------------------------------------- > -- Gennadiy Kiryukhin Development Engineer ATSI 8157 US Route 50 Athens, OH 45701 Phone: (740) 592-2874 Fax (740) 594-2875 ----------------------------------------------------------- To subscribe/unsubscribe: Send a message to icu-pcb-forum-request@xxxxxxxxxxxxx with a subject of subscribe or unsubscribe To view the archives of this list go to //www.freelists.org/archives/icu-pcb-forum/ Problems or Questions: Send an email to icu-pcb-forum-admins@xxxxxxxxxxxxx -----------------------------------------------------------