[PCB_FORUM] Re: Design a complete layout using mentor schematics and Allegro Layout tool setup

  • From: "sathish kumar" <sathish6in@xxxxxxxxxxx>
  • To: icu-pcb-forum@xxxxxxxxxxxxx
  • Date: Tue, 25 Jul 2006 17:08:15 +0000

Thanks Michael

With Sincere,

Sathish.

" Efforts may fail but, dont fail to make Efforts " 

 

From: "Baumstark Michael-EMB043" <M.Baumstark@xxxxxxxxxxxx>
Reply-To: icu-pcb-forum@xxxxxxxxxxxxx
To: <icu-pcb-forum@xxxxxxxxxxxxx>
Subject: [PCB_FORUM] Re: Design a complete layout using mentor schematics and Allegro Layout tool setup
Date: Tue, 25 Jul 2006 09:40:37 -0400

Sathish:
 
So it sounds like, from your reply, that you will be using Mentor "source" library parts converted over to Cadence.
 
Just so you know:
 
There are two modes of translation.
 
One method is the back-end translation (PCB layout) using the mbs2brd translator. This works as a stand-alone executable or it can be found in the Pull-down menu of SpecctraQuest (or currently known as Allegro ...SI) And exisitng Mentor layout to Allegro layout.
 
The other mode is a library part translator  (Mentor Graphics Corp. to Cadence) : this may include schematic logic symbols and physical part.  (Translator made by Cadence)
 
So it sounds like you will be provided with parts from your "vendor"?  
 
Of course it appears like you are going down the path of the 3rd party netlist approach and providing the package information to build it in Allegro. (That is the way we used to do it when I was in the PCB service Bureau many moons ago.) 
 
Just wanted to make you aware of those other two options in case you have not explored those possibilities.
 
Good luck.
 
Michael B.
 

From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of sathish kumar
Sent: Tuesday, July 25, 2006 4:06 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Design a complete layout using mentor schematics and Allegro Layout tool setup


Michael ,

You are right . iam going to use mentor schematics and design the layout in cadence allegro. So the netlist and library has to be translated to allegro required format for doing routing and gerbers. I found a way to import the mentor netlist using thirdparty option in cadence. Iam yet to get the mentor to allegro converted library parts from vendor. need to confirm it soon.

I hope you got my idea and i have already received some useful information from some of the engineers in this forum. Lets make the things happen. Thanks for a prompt response.

 

With Sincere,

Sathish.

GDA Technologies, Inc.

" Efforts may fail but, dont fail to make Efforts " 

 

From: "Baumstark Michael-EMB043" <M.Baumstark@xxxxxxxxxxxx>
Reply-To: icu-pcb-forum@xxxxxxxxxxxxx
To: <icu-pcb-forum@xxxxxxxxxxxxx>
Subject: [PCB_FORUM] Re: Design a complete layout using mentor schematics and Allegro Layout tool setup
Date: Mon, 24 Jul 2006 18:33:09 -0400

Sathish:
 
Hey I am not if you have considered this possibility in your bag of tricks: have you thought about going to layout in Mentor, doing a quick place in Mentor, then perform a File _import _Mentor using the CDS SI tool (this runs the mbs2brd) translation from within the Allegro_SI engine.  From there you will have an uncompleted Layout going on in Allegro. Of  course if you need to supply Cadence Library footprints, you could substitute them in an extracted placement file; otherwise you would be using footprints generated from the Mentor Library. (Obviously you could have a host of conventional differences (pin numbers/names etc.) if you need to match up with a Cadence library of footprints.  
 
I haven't really had to deal with this type of conversion before and  I do not know your exact requirements are. But I have had the similar task to use a Mentor schematic and mentor layout and then continue the design in Cadence (no requirement to backannotate to Mentor). Here we did use a native Cadence schematic capture then meshed the translated layout to sync up. with the Cadence schematic. It takes a little bit of work to get done. But this is for a special requirements situation.
 
Maybe that is a viable solution, depending on which Library footprints you need to use. 
 
Speaking of using the design compare utility, which I saw  Kumaran M, reply to you.   I have a question about Design compare utility.  The other day I was using the Design Compare utility while having a session of  Allegro open. I had cross probing capability going on. For example, I could select a reference designator in the Compare list and it would center up on hte screen in Allegro. I am trying to do this again and my cross-probing feature is not working. (When I first saw it happening it was a present surprise.) Now I cannot get it to work again. Does anybosy have any suggestion to enable cross-probing from Design compare utility and Allegro Layout?
 

Sincerely yours,

Michael Baumstark

Staff PCB Designer - BSEE, CID+
Motorola - Advanced Product Technology Center
8000 West Sunrise Blvd.  Mail Stop: 8E8
Plantation, FL USA 33322-9947
Intra: http://rprc.mot.com  ; http://pcbadvisor.mot.com
web: http://www.motorola.com
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Motorola Internal Use                      [      ]
Motorola Confidential Proprietary    [      ]


From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of sathish kumar
Sent: Tuesday, July 18, 2006 2:49 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Cc: Sue.Reade@xxxxxxxxxxx
Subject: [PCB_FORUM] Design a complete layout using mentor schematics and Allegro Layout tool setup

Hi

I have a requirement to design a board from mentor schematics and to work the layout in Cadence Allegro tool. I got some suggestions from forum to translate the netlist from mentor to Cadence earlier.

Can you provide your suggestions about this setup and difficulties working on different tools so that i can prepare myself about each milestones.

I have some questions on working on these ways. Pls provide your answers.

1) Once all the intial netlist .tel gets imported into Allegro tool, if we need to import netlsit changes (eco) at many times in the middle phase of project. How it can be imported each time without any issues using third party allegro netlist.

2) How can the back annotation process works from allegro layout to mentor schematics. Isit possible?

3) How can we compare the final layout and netlist with different packages to go ahead on gerbers release.

Pls let me know if any more problems expected in this design execution process. This is a fairly complex design with around 22 layers.

Expecting your valuable answers and suggestions. Thanks in Advance.

 

With Sincere,

Sathish.

GDA Technologies, Inc.

" Efforts may fail but, dont fail to make Efforts " 

 

From: "Reade, Sue" <Sue.Reade@xxxxxxxxxxx>
Reply-To: icu-pcb-forum@xxxxxxxxxxxxx
To: <icu-pcb-forum@xxxxxxxxxxxxx>
Subject: [PCB_FORUM] Re: Netlist conversion from mentor tool to Allegro tool
Date: Tue, 11 Jul 2006 13:49:47 -0500

I think you may have more questions in mind, but I'll take the simple track.
Allegro reads in .tel files with no problem. 3rd party netlist
File
Import
Logic
Other
find your .tel file in the ... button
run the syntax check only first to make sure your netlist is structurally sound.
then select supercede all logical data (this actually means read the netlist).
Now for the problems, you will need a config file on the mentor side so that you translate correctly - this may take some work - talk to your mentor vendor.
also you will need to have the .txt files that are created at the time you run your netlist (these are the devices files) and point to them through your env file. I have not run designer in a long time but I think you need to select the option to create them.

From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of sathish kumar
Sent: Tuesday, July 11, 2006 2:31 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Netlist conversion from mentor tool to Allegro tool


Hi,

I need to convert a netlist from mentor DX designer tool to Cadence Allegro appropriate tool. Is there anyway to translate the netlist from mentor to Allegro. Pls share the possibilties to do this conversion and i need to know this as quick as possible.

Thanks in advance for everyone

 

With Sincere,

Sathish.

GDA Technologies, Inc.

" Efforts may fail but, dont fail to make Efforts " 

 

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