DFA? DFT? We build parts according to specs or examples which are hopefully provided by each customer with the original start package (or not - in which case, we go with our standard library which is built to IPC specs for bodies, and worst case specs for placebounds - BTW, they keep changing - it wasn't too long ago that we were doing ICT at 75 mil spacing, and BGA rework isn't as much of a consideration for assembly clearances as it used to be). We maintain separate libraries for each customer. Not by board, but by technology groups in some cases. I agree with you on worst case planning in the case of libraries. Not very efficient. I don't know how far Cadence will go with this. They've said repeatedly that Allegro is not a verification tool. Ken Kiplinger Design Solutions, Inc. www.designsolutions.com -----Original Message----- From: Gene Carman [mailto:gcarman@xxxxxxxxxxxxxxx] Sent: Tue 6/8/2004 9:18 AM To: icu-pcb-forum@xxxxxxxxxxxxx Cc: Subject: [PCB_FORUM] Re: how do YOU handle component spacing rules? "Worst case" is different for different customers depending on their manufacturing equipment and their ultimate goal for their products. So what is worst case for one customer, could be a walk in the park for another... Sort of like line and space rules: some can do 3/3 mils and do not charge a premium, others can barely do 4/4. The 3/3 guys want small handheld products, thus they consider 3/3 a walk in the park. The 4/4 guys want cheap products, so they push for 4/5 for cheaper processes. Some can do stacked microvias, others cannot. It all comes down to design density and the customer goal. I will have to play with the DFA rules, but it sure would be nice to have these as true on line DRCs. (I know, I know... future release) Someone suggested building in the limits into my place bound layer... great idea... lessee that means modify the library for each design... oh yeah, that sounds expedient. Sorry, but that just does not sound like the best way to do things. Being able to change a variable in a DRC type set of rules is the right way. I notice that this is planned for the future. Thanks all. -----Original Message----- From: Kevin McCowan [mailto:kmccowan@xxxxxxxxxxxxxx] Sent: Tuesday, June 08, 2004 6:16 AM To: icu-pcb-forum@xxxxxxxxxxxxx Subject: [PCB_FORUM] Re: how do YOU handle component spacing rules? Why not just make everything worst case? If you can do it that way it seems as though everyone would be happy. It might cause you some distress, but you wouldn't have to make different parts for different customers and the rules would apply. It has been they way I have always worked and it hurts a little, sure, but it solves the problem without a lot of tom-foolery. And while you are figuring that out, why not alert Cadence that this type of ruleset would be extremely useful to you. I would certainly welcome rules of this type added to the already formidable toolset we have. Good luck, Kevin McCowan SR. PCB Designer TSI Telsys > -----Original Message----- > From: icu-pcb-forum-bounce@xxxxxxxxxxxxx > [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx]On Behalf Of Gene Carman > Sent: Tuesday, June 08, 2004 12:00 AM > To: icu-pcb-forum@xxxxxxxxxxxxx > Subject: [PCB_FORUM] how do YOU handle component spacing rules? > > > Is there a way to set a component type to component type rule? What I = > mean is that certain component types tend to have different rules... = > such as 0402 to 0402 verses 0402 to SOT or BGA. > > The only rules I have found are pad to pad... which does not allow for = > different type rules. > > I spoke to some other designers and they offered two solutions: One is = > to build visual indicators into the parts so you can tell if your 0402 = > is too close to another 0402 or BGA... great, no DRC there. The other = > solution is simply use grids and place them... again no DRC. > > I have different customers that require different spacings. One = > customer wants 20 mils between 0402 pads, another wants 25. Customer 1 = > wants 50 mils between BGA and 0402, customer 2 wants 40 mils between BGA = > and any other comp. =20 > > With other tools I had the ability to assign components to a component = > type and then assign rules of type to type. I don't see a way to do = > that in Allegro (15.1) (very similar to net type rules in Allegro, for = > component to component spacing) > > What do you do? > ----------------------------------------------------------- > To subscribe/unsubscribe: > Send a message to icu-pcb-forum-request@xxxxxxxxxxxxx > with a subject of subscribe or unsubscribe > > To view the archives of this list please login at > //www.freelists.org. Our list name is icu-pcb-forum > or go to //www.freelists.org/archives/icu-pcb-forum/ > > Problems or Questions: > Send an email to icu-pcb-forum-admins@xxxxxxxxxxxxx > > Want to post a job listing ? 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