[ibis] Asian IBIS Summit (Tokyo) - Agenda and Registration

From: "Randy Wolff" <dmarc-noreply@xxxxxxxxxxxxx> (Redacted sender "rrwolff" for DMARC)
To: "'ibis@xxxxxxxxxxxxx'" <ibis@xxxxxxxxxxxxx>, "'ibis-users@xxxxxxxxxxxxx'" <ibis-users@xxxxxxxxxxxxx>
Date: Thu, 31 Oct 2019 14:14:11 +0000

[IBIS_logo]

Asian IBIS Summit (Tokyo) 2019
Agenda and Registration

________________________________
TIME AND DATE:
Friday, November 8, 2019, 12:30 to 17:00
Meeting starts at 13:00
LOCATION:
Akihabara UDX Bldg.
4-14-1, Sotokanda, Chiyoda-Ku
Tokyo 101-0021, Japan
Akihabara UDX Building (Japanese)<http://udx.jp/>
Akihabara UDX Building (English)<http://www.akiba-cross.jp/english/>
ROOM:
NEXT-1
CONTENT:
Presentations and Discussions
PURPOSE:
Solicit and exchange IBIS and interconnect model related information and ideas.
ORGANIZATIONAL SPONSORS:
Japan Electronics and Information Technology Industries Association (JEITA)
IBIS Open Forum
CO-SPONSORS:
(alphabetical order):
ANSYS, Inc.
Apollo Giken Co., Ltd.
Keysight Technologies
Ricoh
Toshiba Corporation
Zuken, Inc.
COST:
FREE
JEITA IBIS Class and SUMMIT:
Event Information
Link<http://ec.jeita.or.jp/jp/modules/eguide/event.php?eid=41> (Japanese)
Flyer Link<http://ec.jeita.or.jp/download/ibis_seminar_20191108_leaf.pdf>
(Japanese)
________________________________

BACKGROUND

This year we are holding the 14th Asian IBIS Summit meeting in Japan. Several
high-technology Japanese companies operate in the Tokyo and Yokohama area and
are affiliated with JEITA and IBIS.

IBIS SUMMIT

This meeting will be conducted as a formal IBIS Summit Meeting. Presentations
will be archived in an electronic format on our Summits site, and minutes of
the meeting will be issued. However, no formal decisions requiring votes will
be planned.

http://www.ibis.org/summits/

CALL FOR PARTICIPANTS

People involved in IBIS and interconnect model development, EDA tool
development, and digital circuit design are invited to participate in the
Summit meeting. If you plan to participate, please register using the
information below (in English):
Name:

E-mail address:

Company:

Country:

Send to both:
Bob ROSS, Teraspeed Labs (bob@xxxxxxxxxxxxxxxxx<mailto:bob@xxxxxxxxxxxxxxxxx>)
Satoshi NAKAMIZO, Keysight Technologies Japan K.K.
(edamodel@xxxxxxxxxxxx<mailto:edamodel@xxxxxxxxxxxx>)
Signup Deadline:
November 1, 2019

AGENDA (Tentative)

13:00   SIGN IN

13:05   MEETING WELCOMES

  *   Randy WOLFF (Micron Technology, USA)
Chair, IBIS Open Forum
  *   Satoshi NAKAMIZO
(Keysight Technologies Japan K.K., Japan)

13:15   IBIS Chair's Report

Randy WOLFF (Micron Technology, USA)

13:30   Expectations for the New Package Model Specification of IBIS 7.0

Masaki KIRINAKA, Akiko TSUKADA (Fujitsu Interconnect Technologies Limited,
Japan)

14:00   The On Die Decap Modeling Proposal (BIRD198)

Megumi ONO (Socionext Inc., Japan)

14:35   IBIS File Format Links

Bob ROSS (Teraspeed Labs, USA)

[Presented by Randy WOLFF (Micron Technology, USA)]

15:00   BREAK

  *   Reconvene at 15:20

15:20   How to Obtain Buffer Impedance from IBIS

Lance WANG (Zuken, USA)

15:50   A Potential Application of IBIS Models to CISPR25 Based EMI Analysis of
DCDC Converter

Kazuyuki SAKATA*, Koji ICHIKAWA**, Miyoko GOTO***, Toshiki KANAMOTO****

(Renesas Electronics Corporation*, DENSO Corp.**, Ricoh Corp.***, Hirosaki
University****; Japan)

[Presented by Kazuyuki SAKATA (Renesas Electronics Corporation, Japan)]

16:10   IBIS-AMI and COM Co-design for 25G Serdes

Nan HOU*, Amy ZHANG*, Guohua WANG*, David ZHANG**, Anders EKHOLM** (Ericsson,
*PRC, **Sweden)

[Presented by Anders EKHOLM (Ericsson, Sweden)]

16:50   CONCLUDING ITEMS

17:00   END OF IBIS SUMMIT MEETING

  *   Thank you for your participation

[ibis] Asian IBIS Summit (Tokyo) - Agenda and Registration

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