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Asian IBIS Summit (Taipei) 2019
Agenda and Registration
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TIME AND DATE:
Monday, November 4, 2019, 8:00 AM to 4:50 PM
Meeting starts at 9:00 AM
LOCATION:
Sherwood Hotel<http://www.sherwood.com.tw/>
111 Min Sheng E Road, Sec. 3
Taipei, Taiwan
ROOM:
3F
CONTENT:
Presentations and Discussions
PURPOSE:
Solicit and exchange IBIS and interconnect model related information and ideas.
CO-SPONSORS:
(alphabetical order):
ANSYS
Cadence Design Systems
Synopsys
Others to be determined
COST:
FREE, including refreshments and buffet lunch
VENDORS:
Some vendors will have information tables and may give presentations during the
Vendor Session.
Contact us for details regarding sponsorship.
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BACKGROUND
We have held many successful Summit meetings across Asia in previous years.
This will be our tenth meeting in Taiwan where many national and international
high technology companies have operations. These events are archived along with
all our other Summits:
http://www.ibis.org/summits/
CALL FOR PARTICIPANTS
People involved in IBIS and interconnect model development, EDA tool
development, and digital circuit design are invited to participate in the
Summit meeting. If you plan to participate, please register using the
information below (in English):
Name:
E-mail address:
Company:
Send to both:
Lance Wang, Zuken USA (lance.wang@xxxxxxxx<mailto:lance.wang@xxxxxxxx>)
Bob Ross, Teraspeed Labs (bob@xxxxxxxxxxxxxxxxx<mailto:bob@xxxxxxxxxxxxxxxxx>)
Signup Deadline:
October 28, 2019
AGENDA
09:00 SIGN IN
* Vendor Tables Open at 9:00
09:30 MEETING WELCOME
Randy Wolff (Chair, IBIS Open Forum)
(Micron Technology, USA)
09:45 IBIS Chair's Report
Randy Wolff (Micron Technology, USA)
10:05 Introducing IBIS Version 7.0
Michael Mirmak*, Randy Wolff**
(*Intel Corporation, **Micron Technology; USA)
[Presented by Randy Wolff (Micron Technology, USA)]
10:30 BREAK
* Refreshments and Vendor Tables
* Reconvene at 10:50
10:50 How to Obtain Buffer Impedance from IBIS
Lance Wang (Zuken, USA)
11:20 IBIS-AMI and COM Co-design for 25G Serdes
Nan Hou*; Amy Zhang*; Guohua Wang*; David Zhang**; Anders Ekholm**
(Ericsson, *PRC, **Sweden)
[Presented by Anders Ekholm (Ericsson, Sweden)]
12:00 FREE LUNCH (hosted by sponsors)
* Reconvene at 13:30
13:30 Innovations in DDR Memory Simulation
Stephen Slater (Keysight Technologies, USA)
[Presented by Nash Tu (Keysight Technologies, Taiwan)]
14:10 Channel Simulation Over DDR4/5 and Above
Kumar Keshavan*, Ambrish Varma*, Ken Willis*, Skipper Liang**
(Cadence Design Systems, *USA, **Taiwan)
[Presented by Skipper Liang (Cadence Design Systems, Taiwan)]
14:40 IBIS File Format Links
Bob Ross (Teraspeed Labs, USA)
[Presented by Randy Wolff (Micron Technology, USA)]
15:10 CONCLUDING ITEMS
15:15 END OF IBIS SUMMIT MEETING
* Thank you for your participation
15:15 BREAK
* Refreshments and Vendor Tables
15:35 VENDOR PRESENTATIONS, MODERATOR
Lance Wang (Vice-chair, IBIS Open Forum)
(Zuken, USA)
16:50 END OF VENDOR PRESENTATIONS
* Thank you to our sponsors