[ibis-macro] Minutes from the 24 feb 2009 ibis-atm meeting

  • From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
  • To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Tue, 3 Mar 2009 10:33:12 -0500

Minutes from the 24 feb 2009 ibis-atm meeting are attached.

IBIS Macromodel Task Group

Meeting date: 24 February 2009

Members (asterisk for those attending):
* Adge Hawes, IBM
  Ambrish Varma, Cadence Design Systems
* Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  David Banas, Xilinx
  Donald Telian, consultant
  Doug White, Cisco Systems
* Eckhard Lenski, Nokia-Siemens Networks
  Essaid Bensoudane, ST Microelectronics
* Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
* Ian Dodd, Agilent
* Jerry Chuang, Xilinx
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
* Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
* Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Terry Jernberg, Cadence Design Systems
* Todd Westerhoff, SiSoft
* Vladimir Dmitriev-Zdorov
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems


Arpad noted that LiveMeeting connections seem to be more troublesome
when run through a VPN.

Call for patent disclosure:

- No one declared a patent.

Review of ARs:

- Walter: Invite IC vendors to meeting in 2 weeks using ibis-list

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

New Discussion:

Walter shared "Creating Broadband Analog Models for SerDes Applications":
- This was presented by Adge at last IBIS summit
- It is found on the IBIS website
  - http://www.vhdl.org/pub/ibis/summits/feb09/hawes.pdf
- Page 3:
  - Analog can be modeled as IV/VT with C_comp, or with External Circuit
- Page 4:
  - Michael Mirmak showed that frequency dependence of buffers is strong
- Page 5:
  - We need a new model, but it should leverage existing work.
  - Models using s-params are interesting.
- Page 7:
  - The driver can be an ideal source with an s4p filter model
- Page 8:
  - We have no way to include s-param blocks in IBIS
- Page 9:
  - Other suggestions include RC ladder, Final_Stage subckt
- Page 10:
  - An alternative is a new TSTONEFILE IBIS keyword

- Bob: What is the process for generating these s4p files?
- Adge: Agilent uses standard s-param extraction tools
  - Create a differential model circuit into ideal loads.
  - Extract from 20MHz to 25GHz, linear spacing around 20MHz
  - IC tools are used
  - We can also extract Y-params using this technique
  - Sometimes several extractions are required:
    - For example, with DFE on and DFE off
    - Also one corner at a time
  - The Agilent tool extrapolates down to DC
  - Logarithmic files would be smaller than linear
- Bob: How does one get additional input ports?
  - Adge: This needs to be discussed
  - Walter: The tool is given 4 nodes and told to extract
- Bob: The input waveform has zero rise time?
  - Walter: In AMI, TX Init() produces this type of waveform

Arpad showed TX waveforms:
- The processed waveform has a DC shift relative to the input
  - Arpad is concerned that different vendors might process differently
- Adge: The AMI spec should specify the processing more tightly
- Arpad: How can this work without extracting down to DC?
  - Adge: Extraction can go lower than 20MHz
  - Todd: Knowing the resistance should be enough to generate DC
  - Arpad: But too many s-param models don't have DC, regardless
  - Todd: How many cycles do we have with a 5GHz signal into 20MHz?
  - Walter: There are lots of tools that work fine with existing s-params
- Todd: Do we need to publish a guideline?
  - Michael M: There is a parallel to IBIS:
    - We put out only a format specification
    - The data can be crap
    - Should we have quality controls in the format?
- Todd: The problem goes beyond just DC operating point
  - We would have to go out 500 symbols to see 20MHz effects on 5GHz
  - Also, differential circuits cancel out DC bias problems
  - Vladimir: The common mode is still important in differential signaling
    - Non-LTI effects affect the outcome
- Adge: We do not have a good way to describe channels other than with s-params
- Vladimir: But s-param has problems:
  - Non-causality
  - Insufficient resolution
  - Huge dynamic band makes linear spacing impractical
  - HSPICE only supports linear s-params
- Adge: We should have quality controls for s-param models
  - Walter: These will be created by vendors producing serious models
  - Todd: We will run into hiccups bringing this to every tool
    - Putting this in IBIS we can add quality controls
- Arpad: Some people are going beyond s-params to describe channels
  - Todd: IBIS AMI makes assumptions of channel characterization
    - Operating point is the only issue
- Walter: Adge wanted to put passive and causal restrictions on s-params

Ian asked Walter to show Adge's slide 4 again:
- Ian: Slide 4 shows both frequency and voltage dependence
- Michael M's RC ladder proposal handles both of these
  - We should be able to convert between RC ladder and s-param
  - Also we can generate separate s-param models at different bias voltages
  - We should be able to support both without difficulty
- Arpad: Can any simulators take multiple s-param sets?
  - Adge: Agilent has a coarse multi-voltage capability
    - But it is switched, not dynamic
  - Bob: Will an s-param at some mid-point voltage be good enough?
    - Adge: If the model scales well with voltage we can produce this
    - Bob: Only limited voltage ranges are needed
- Adge: The discussion is about using s-params in IBIS, not finding a new model
- Bob: A model may be a good frequency domain model, but not voltage domain
  - Todd: Linear links will work fine with this
    - A different analysis will be used to study bias points
    - We will not be able to run enough bits with that analysis, though
- Mike L: Maybe frequency domain Golden Waveforms would help insure quality
  - Michael M: We would need good specs on how to do that
  - Mike L: It should help to at least verify DC accuracy
- Arpad: Who would be willing to start a BIRD for IBIS s-params?

AR: Todd start a BIRD for IBIS s-params

Next meeting: 03 March 2009 12:00pm PT


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