Walter, In this email I would like to point out the similarities between some of the concepts in your presentation and BIRD 125. I will refer to the page numbers in my presentation that is posted on the ATM website: http://www.vhdl.org/pub/ibis/macromodel_wip/archive/20120724/arpadmuranyi/Package%20Modeling%20in%20IBIS/PackageModeling_with_BIRD125_145.pdf Except for the direct instantiation of the clkx.s4p Touchstone file for the on-die interconnect, the example on slide 14 of your presentation is basically showing the same concept as my example on slides 3 and 5. The circuit and syntax are not the same in these two examples, but the concepts are almost identical. The [Pin Die Data] keyword in your example is the equivalent of the [Pin Numbers] keyword in my example, the difference is that you put it into the .ibs file, and I have it in the .pkg file. The purpose of either one is to declare the implicit and explicit die pads/bumps/ports, etc... so that connections could be made to those nodes. Your IBIS-ISS instantiation uses the tree syntax, and I used the [External Model] syntax. But "Ports" are "Ports", and file names and subcircuit names are file names and subcircuit names. I am fine with either format, we can decide on that as we go. These concepts are also present on your slides 23 - 26, 30, basically everywhere where you connect the package and on-die interconnect models by pin/ball/pad/bump/node names. I also noticed that on slides 14, 23-26, 30 you connect the package model by listing the pin and die node names directly on the "Ports" parameter. Here you only have a "Package_models" branch in the tree, while on slide 16, you show a "Package_model_Assignments" branch which makes connections by pin names, but refer to the previous page where the "Package_models" branch uses special reserved names on the "Ports" parameter. It seems that you are using this mechanism to make use of a small package or on-die interconnect model along multiple pins/pads. This is the equivalent of the concept I showed on slides 17-25 in my presentation using the "Port_map" with the parameterized "Port_map_name" and "position" concept to "slide" the same package model along multiple pins/pads/nodes. By the way, there is a typo on my slide 25 on the right side: Port_map PortMapName_3 nodes pad_1 Port_map PortMapName_4 nodes pad_2 should read: Port_map PortMapName_3 nodes pad_a Port_map PortMapName_4 nodes pad_b to match with pad_a and pad_b on the right side under [Node Declarations]. This concept in my presentation also allows the package and on-die interconnect models to be associated more closely with [Model]s than with [Pin]s, although this is not explicitly stated in my presentation as it is in yours. So in summary, the concepts in both of our proposals are fundamentally very similar. Your proposal has a few features I don't have in mine: - power supply voltages and models - x-y coordinates - application specific, special purpose models and syntax - direct instantiation of Touchstone models but I personally question the need for the first three of these. The direct call of Touchstone files could be easily added to my proposal also, but I was under the impression that most of us were not too keen on doing that (BIRD 144 discussions), since the IBIS-ISS subcircuit approach is a superset of that. Questions, comments are welcome. Thanks, Arpad ================================================================== From: ibis-macro-bounce@xxxxxxxxxxxxx<mailto:ibis-macro-bounce@xxxxxxxxxxxxx> [mailto:ibis-macro-bounce@xxxxxxxxxxxxx]<mailto:[mailto:ibis-macro-bounce@xxxxxxxxxxxxx]> On Behalf Of Walter Katz Sent: Tuesday, August 07, 2012 6:40 PM To: IBIS-ATM Subject: [ibis-macro] IBIS-ISS Package Modeling Next Steps All, At the next IBIS-ATM I would like to answer any questions about the presentation I gave today. Posted at: http://tinyurl.com/cvykehz or the full URL: http://www.eda.org/pub/ibis/macromodel_wip/archive/20120806/walterkatz/IBIS-ISS%20Package%20Modeling/IBIS_ISS_Package_Modeling_120807.pdf If you do have any questions, please either e-mail to this reflector or me directly. More importantly, questions to the IC Vendor members: 1. Does the functionality described in this presentation satisfy your needs to generate package and on-die models using that your customers require? 2. If not, what additional functionality do you need? 3. Please e-mail answers to question 2 to this reflector or me directly in advance of the next IBIS-ATM meeting. Finally, we need to decide whether to pursue this methodology, or use the methodology describes in BIRDs 125 and 145: http://www.vhdl.org/pub/ibis/macromodel_wip/archive/20120724/arpadmuranyi/Package%20Modeling%20in%20IBIS/PackageModeling_with_BIRD125_145.pdf Make IBIS-ISS Available for IBIS Package Modeling<http://www.eda.org/ibis/birds/bird125.1.txt> Cascading IBIS I/O buffers with [External Circuit]s using the [Model Call] keyword<http://www.eda.org/ibis/birds/bird145.2.txt> Walter Walter Katz wkatz@xxxxxxxxxx<mailto:wkatz@xxxxxxxxxx> Phone 303.449-2308 Mobile 303.335-6156 -- This message has been scanned for viruses and dangerous content by MailScanner<http://www.mailscanner.info/>, and is believed to be clean.