So, after all this, how should we define/describe A_gnd in IBIS?
- is it something global
- is it something local
- is it a signal/power ground
- is it a chassis ground
- is it an earth ground
- is it a reference
- anything else?
Obviously some of these are nonsense, but (except for the last one)
they were all mentioned in this conversation one way or another…
By the way, if we want to call it a reference instead of ground, we
might want to consider a new IBIS reserved name for it: A_ref
(just be consistent with how we would refer to it in the text)…
Thanks,
Arpad
=====================================================
From: ibis-macro-bounce@xxxxxxxxxxxxx [mailto:ibis-macro-bounce@xxxxxxxxxxxxx] ;
On Behalf Of David Banas
Sent: Thursday, March 8, 2018 12:23 AM
To: Bradley Brim <bradb@xxxxxxxxxxx>
Cc: IBIS-Interconnect (ibis-interconn@xxxxxxxxxxxxx)
<ibis-interconn@xxxxxxxxxxxxx>; ibis-macro@xxxxxxxxxxxxx
Subject: [ibis-macro] Re: [ibis-interconn] Re: A_gnd in IBIS 6.1
Okay, understood.
Here is a great paper that pretty thoroughly debunks the “ground bounce” myth:
https://www.ipen.br/biblioteca/cd/ieee/1999/Proceed/00403.pdf
-db
On Mar 7, 2018, at 4:38 PM, Bradley Brim
<bradb@xxxxxxxxxxx<mailto:bradb@xxxxxxxxxxx>> wrote:
David,
[David] Could you break this down a little further, please?
[Brad] No. I do not wish to have a public discussion on this topic.
-Brad
From: David Banas [mailto:capn.freako@xxxxxxxxx]
Sent: Wednesday, March 7, 2018 2:20 PM
To: Bradley Brim <bradb@xxxxxxxxxxx<mailto:bradb@xxxxxxxxxxx>>
Cc: IBIS-Interconnect
(ibis-interconn@xxxxxxxxxxxxx<mailto:ibis-interconn@xxxxxxxxxxxxx>)
<ibis-interconn@xxxxxxxxxxxxx<mailto:ibis-interconn@xxxxxxxxxxxxx>>;
ibis-macro@xxxxxxxxxxxxx<mailto:ibis-macro@xxxxxxxxxxxxx>
Subject: Re: [ibis-macro] Re: [ibis-interconn] Re: A_gnd in IBIS 6.1
EXTERNAL MAIL
Hi Brad,
Thanks for the reply.
If your comments refer to the physical circuit then I agree with you.
If, however, they refer to the simulation then I disagree.
I claim that, when we use a netlist based, lumped element, SPICE style
simulator, we accept the following limitations:
1. We cannot know the difference in absolute potential between two
physically disparate areas of the circuit under simulation. (Nor would knowing
this serve any purpose, since it is a meaningless quantity, as you observe.)
2. The “local reference” for voltages, in any part of the circuit, must be
the “0” net, since that is the net that all other net voltages are given with,
and assumed to be in, reference to, by the simulator.
3. No current flows between any two nodes connected to the “0” net. (I
believe this property extends to all nets, actually.)
4. If we accept #1 and #3 then the constraint imposed by #2 does us no harm,
since the only inaccuracy it introduces into our simulation involves a quantity
we shouldn’t be trying to know, anyway, since it is meaningless, namely, the
absolute potential difference between physically disparate areas of our circuit.
Could you break this down a little further, please?:
Any path to a global reference in the silicon is improper, even something as
seemingly innocuous as connecting the substrate to a global reference because
it is applied as the reference for resistive and capacitive effects with
non-zero net current flow through a truly non-existent branch.
Specifically, what is the “non-existent branch” you’re referring to?
And, finally, a question:
If I did decide that I wanted some net other than “0” to be the reference for
voltages in a certain portion of my circuit, how would I communicate this fact
to my SPICE style simulator?
Thanks,
-db
On Mar 7, 2018, at 1:32 PM, Bradley Brim
<bradb@xxxxxxxxxxx<mailto:bradb@xxxxxxxxxxx>> wrote:
A common example is an IC in a package on a board.
The voltage at any node in the silicon referenced to global node 0 connected to
the (-) terminal of the PCB voltage regulator is not meaningful and cannot be
measured and is path-dependent other than at DC. The voltage at that same node
in the silicon referenced to another local node in the silicon is meaningful.
Any path to a global reference in the silicon is improper, even something as
seemingly innocuous as connecting the substrate to a global reference because
it is applied as the reference for resistive and capacitive effects with
non-zero net current flow through a truly non-existent branch.
The question to be asked is not effectively one of “For what applications is a
local reference required without global reference”, but instead “For what
applications is a global reference required”.
Please notice I did not use the word “ground” anywhere ☺
From: David Banas [mailto:capn.freako@xxxxxxxxx]
Sent: Wednesday, March 7, 2018 11:57 AM
To: Bradley Brim <bradb@xxxxxxxxxxx<mailto:bradb@xxxxxxxxxxx>>
Cc: wkatz@xxxxxxxxxx<mailto:wkatz@xxxxxxxxxx>;
ibis-macro@xxxxxxxxxxxxx<mailto:ibis-macro@xxxxxxxxxxxxx>;
ibis-interconn@xxxxxxxxxxxxx<mailto:ibis-interconn@xxxxxxxxxxxxx>
Subject: Re: [ibis-macro] Re: [ibis-interconn] Re: A_gnd in IBIS 6.1
EXTERNAL MAIL
For some subcircuits there will be a desire to have only a local reference for
voltage.
Could someone, please, provide an example of the above?
Thanks,
-db
On Mar 7, 2018, at 10:42 AM, Bradley Brim
<bradb@xxxxxxxxxxx<mailto:bradb@xxxxxxxxxxx>> wrote:
For some subcircuits there will be a desire to have only a local reference for
voltage.
