[hsdd] High-Speed Digital Design Newsletter MITIGATING CROSSTALK

  • From: "Dr. Howard Johnson" <howiej@xxxxxxxxxx>
  • To: <hsdd@xxxxxxxxxxxxx>
  • Date: Fri, 24 Jan 2003 08:49:07 -0800

                 MITIGATING CROSSTALK

                           

HIGH-SPEED DIGITAL DESIGN    -  online newsletter  -
Vol. 6,  Issue 01
January 23, 2003


  Welcome to the New Year!
  
  My family and I have returned from a semester spent
  at the University of Oxford, where I tutored
  undergraduates, studied signal integrity issues on-
  chip, and delivered my High-Speed Digital Design
  seminar at several European venues. Travel is
  wonderful, but it is great to be home, too.
  
  Those of you interested in the release of my long-
  awaited new book on signal integrity need not wait
  much longer. The copy-editing and page layout
  processes are now complete. It is currently
  available for pre-sales at www.barnesandnoble.com. I
  expect the first printing in late February or early
  March of 2003.
  
  The new book is titled, "High-Speed Signal
  Propagation: More Black Magic". It is a companion to
  the original book, High-Speed Digital Design: A
  Handbook of Black Magic, Prentice-Hall, 1993. The
  two books may be used separately or together. They
  cover different material.
  
______________________________________________________

MITIGATING CROSSTALK

(Continued from vol. 5, #11)

  In the last newsletter, Mr. Manivassakam asked what
  level of crosstalk would be acceptable in his
  design. This note considers what can be done to
  reduce the amount of crosstalk in his board.
  
______________________________________________________

Dr. Johnson replies:

  For crosstalk to perturb the operation of a state
  machine, the following sequence of events must take
  place.
  
  1. First, your system must generate an aggressive
  signal. This is usually an intentional signal,
  meaning that it appears in the system for some
  useful purpose other than just to bother the victim.
  
  2. The aggressive signal couples through some
  mechanism into the victim circuit.
  
  3. The coupled signal arrives at a time when the
  victim circuit is receptive to noise.
  
  4. The coupled signal exceeds the available noise
  margin in the victim circuit at the time of
  reception.
  
  5. In cases where the noise from one aggressor is
  not enough to cause data errors, the aggregate noise
  from multiple simultaneous aggressors may cause
  errors.
  
  This basic outline of the crosstalk scenario
  suggests a number of ways to reduce the impact of
  crosstalk.
  
(1) SHRINK THE AGGRESSOR

  This is not always possible with digital logic;
  however, you can adopt a policy of at least
  separating groups of nets according to their signal
  amplitude. This policy prevents large-voltage nets
  (e.g., 3.3-V) from affecting smaller-voltage nets
  (e.g., 1.5-V).
  
  For example, in the design of a connectorized
  interface you might specify operating voltages for
  the synchronous data at a level lower than the
  asynchronous control signals.
  
(2) REDUCE THE COUPLING

  A solid reference plane is the most powerful tool
  available for reducing crosstalk within a pcb. The
  reference plane may be a ground plane or a power
  plane; either can be equally effective in reducing
  crosstalk between digital signals.
  
  Once a solid reference plane is in place, the
  crosstalk between two parallel nets may be
  dramatically reduced by either spacing the nets
  further apart, or by pressing either trace closer to
  the plane.
  
  If H represents the height of a trace above the
  nearest reference plane, and if the trace-to-trace
  separation S exceeds H, then crosstalk plummets
  roughly quadratically with increased separation.
  Doubling the spacing cuts the crosstalk to roughly
  1/4 its original level.
  
  Pressing the traces closer to the planes also
  reduces crosstalk, with the caveat that as the
  traces are pressed closer to the planes the trace
  width must be correspondingly reduced to maintain
  constant impedance.
  
  Noise couples differently inside an integrated
  circuit. Increased separation does not necessarily
  decrease all forms of crosstalk (especially the
  substrate noise that occurs in a chip with a low-
  resistance substrate). Increased separation
  definitely reduces the direct parasitic capacitance
  from track-to-track, but since the metal tracks in a
  chip are held relatively far up away from any other
  bits of grounded metal the severity of the drop-off
  in crosstalk is not quadratic.
  
  Differential signaling can reduce the coupling
  between nets, but the gains achieved are not as
  dramatic for pcb traces as for twisted-pair cables,
  because the pcb traces are not twisted.
  
  Differential signaling works particularly well as a
  countermeasure against the changing ground voltages
  apparent on either side of a connector.
  
(3) CHANGE THE TIMING

  Regarding crosstalk onto a synchronous net, the
  crosstalk only matters within a small window around
  the moment of clocking. If you can adjust the clock
  feeding the aggressor so that it changes state at a
  time when the victim is NOT being clocked, then the
  interaction between the two circuits disappears.
  
  Some mixed-signal chip architectures provide
  separate time slots for analog and digital
  processing, pinging back and forth continuously
  between analog and digital modes.
  
(4) IMPROVE THE RECEIVER NOISE MARGINS

  The noise margin available at the receiver is the
  difference, in volts, between intentional signal
  presented to the receiver and the internal threshold
  used within the receiver. An additive noise signal
  smaller than this margin cannot possibly create a
  data error.
  
  Uncertainty in the exact setting of the receive
  threshold directly reduces the available noise
  margin, which in turn directly reduces the degree of
  additive crosstalk your system can tolerate.
  
  For example, in a 3.3-volt system a driver going LOW
  might be expected to produce a signal no greater
  than 0.3 volts, while the receiver is guaranteed to
  respond to any signal less than 0.8 volts. The
  difference (the noise margin) in the low state is
  0.5 volts.
  
  Had the receiver threshold been guaranteed between
  1.6 and 1.7 volts, the noise margin in the low state
  given the same transmitter would have been 1.5
  volts, THREE TIMES BIGGER.
  
  Differential receivers generally have very well
  placed thresholds, which partly accounts for their
  popularity in noisy systems.
  
  In a highly attenuated system (like a 2.5-Gb/s
  backplane), any increase in the received signal
  level obtained by using a better transmitter
  (perhaps with pre-emphasis), or a less lossy
  transmission media, will directly increase the noise
  margin.
  
  Most digital logic operates so far above the
  intrinsic internal noise floor of the semiconductor
  structures used to build the receiver that cooling
  the receiver doesn't help greatly, however in the
  design of some infra-red receivers the reduction in
  noise achieved by cooling the receiving elements is
  worth the cost of the cooling apparatus.
  
(5) REDUCE THE NUMBER OF AGGRESSORS

  While it is admittedly difficult to modify one's
  architecture in order to reduce the number of
  aggressors, it is in some cases possible to modify
  the number of aggressors that change state
  simultaneously.
  
  This is accomplished in some systems by skewing the
  clock used on various banks of logic such that the
  aggressors change state at slightly different times.
  The crosstalk resulting from such a system displays
  a sequence of smaller blobs of crosstalk, rather
  than one grand superposition of all signals
  switching at once.
  
  It may in some cases be possible to reduce the
  number of simultaneously switching signals with data
  coding. This approach is used in the coding of
  address lines to reduce the power required and noise
  generated when addressing memory sequentially.
  
I hope this structured examination of crosstalk has
been helpful to you.

Best Regards,
Dr. Howard Johnson

______________________________________________________

  Join us at our upcoming seminar in San Jose, Feb. 4-
  5, 2002. A full schedule of cities and dates appears
  at: http://sigcon.com.
  



Best Regards,

Jennifer Epps
Marketing Director, Signal Consulting, Inc.
PO Box 698  Twisp, WA  98856
t: 509.997.0505
f: 509.997.0566
www.sigcon.com



-- Binary/unsupported file stripped by Ecartis --
-- Type: application/ms-tnef
-- File: winmail.dat


If  you  have an idea that would make a  good  topic for 
a   future  newsletter,  please  send  it to hsdd@xxxxxxxxxxx

To subscribe to this list send an email to 
hsdd-request@xxxxxxxxxxxxx with 'subscribe' in the subject field.

To unsubscribe from this list send an email to 
hsdd-request@xxxxxxxxxxxxx with 'unsubscribe' in the subject field.

Newsletter Archives: http://www.sigcon.com/
Copyright 2002, Signal Consulting, Inc.
All Rights Reserved.

Other related posts:

  • » [hsdd] High-Speed Digital Design Newsletter MITIGATING CROSSTALK