Hi there > One question: how ohci_hcd\uhci_hcd\ehci_hcd obtain its interrupt > resource etc. from pci subsystem? Why there's no such problem with > usb > hcd controllers, maybe this is the quick solution now before pci > resource config implemented. It takes them from the u.h0.interrupt_line field of the pci_info structure. But it really comes down to the same thing you do in firewire, because the PCI bus_manager uses the same calls to fill out the struct. The difference right now is only that you'd safe a call by doing it this way. In the case at hand there really is nothing you can do about it. The PCI info will contain the same interrupt line info, which simply seems to be wrong. As mentioned it was the same for my ipw2100 card. It reported some other interrupt line, but it really was on 5. So besides explicitly configuring it, so that you really know where it is in the end, there's nothing you can do. Please feel free, invited even, to work on configuration. Keep in mind, that we currently don't make use of IOAPICs because we are missing the interrupt routing info there (we would need to get it through ACPI right now). If the PCI configuration also allows to configure the IOAPIC pins that'd solve that issue though so that we could enable IOAPICs (the are otherwise fully implemented, albeit untested). The thing is, that I think in the long run we will have to switch to full ACPI device enumeration. This will also include configuring such things through ACPI and not directly through PCI anymore. For the meantime though, having PCI resource configuration would certainly be very welcome. Regards Michael