Author: kallisti5 Date: 2011-03-06 19:30:16 +0100 (Sun, 06 Mar 2011) New Revision: 40851 Changeset: http://dev.haiku-os.org/changeset/40851 Modified: haiku/trunk/src/add-ons/kernel/drivers/network/wimax/usb_beceemwmx/BeceemDDR.cpp Log: add newlines after case breaks to enhance readability Modified: haiku/trunk/src/add-ons/kernel/drivers/network/wimax/usb_beceemwmx/BeceemDDR.cpp =================================================================== --- haiku/trunk/src/add-ons/kernel/drivers/network/wimax/usb_beceemwmx/BeceemDDR.cpp 2011-03-06 18:26:19 UTC (rev 40850) +++ haiku/trunk/src/add-ons/kernel/drivers/network/wimax/usb_beceemwmx/BeceemDDR.cpp 2011-03-06 18:30:16 UTC (rev 40851) @@ -52,21 +52,23 @@ registerCount = sizeof(asT3LP_DDRSetting80MHz) / sizeof(DDR_SETTING); break; + case DDR_100_MHZ: psDDRSetting = asT3LP_DDRSetting100MHz; registerCount = sizeof(asT3LP_DDRSetting100MHz) / sizeof(DDR_SETTING); break; + case DDR_133_MHZ: psDDRSetting = asT3LP_DDRSetting133MHz; registerCount = sizeof(asT3LP_DDRSetting133MHz) / sizeof(DDR_SETTING); - if (vendorMipsConfig == MIPS_200_MHZ) uiClockSetting = 0x03F13652; else uiClockSetting = 0x03F1365B; break; + default: return -EINVAL; } @@ -107,12 +109,14 @@ registerCount = sizeof(asT3B_DDRSetting80MHz) / sizeof(DDR_SETTING); break; + case DDR_100_MHZ: TRACE("Debug: DDR 100MHz\n"); psDDRSetting = asT3LPB_DDRSetting100MHz; registerCount = sizeof(asT3B_DDRSetting100MHz) / sizeof(DDR_SETTING); break; + case DDR_133_MHZ: TRACE("Debug: DDR 133MHz\n"); psDDRSetting = asT3LPB_DDRSetting133MHz; @@ -151,16 +155,19 @@ registerCount = sizeof(asT3_DDRSetting80MHz) / sizeof(DDR_SETTING); break; + case DDR_100_MHZ: psDDRSetting = asT3_DDRSetting100MHz; registerCount = sizeof(asT3_DDRSetting100MHz) / sizeof(DDR_SETTING); break; + case DDR_133_MHZ: psDDRSetting = asT3_DDRSetting133MHz; registerCount = sizeof(asT3_DDRSetting133MHz) / sizeof(DDR_SETTING); break; + default: return -EINVAL; } @@ -172,13 +179,14 @@ registerCount = sizeof(asT3B_DDRSetting80MHz) / sizeof(DDR_SETTING); break; + case DDR_100_MHZ: psDDRSetting = asT3B_DDRSetting100MHz; registerCount = sizeof(asT3B_DDRSetting100MHz) / sizeof(DDR_SETTING); break; + case DDR_133_MHZ: - if (vendorPLLConfig == PLL_266_MHZ) { // 266Mhz PLL selected. memcpy(asT3B_DDRSetting133MHz, asDPLL_266MHZ, @@ -198,6 +206,7 @@ uiClockSetting = 0x07F1365B; } break; + default: return -EINVAL; }