#3: PCI bus_manager does no memory resource assignment
------------------------------+-----------------------------
Reporter: marcusoverhagen | Owner: marcusoverhagen
Type: bug | Status: in-progress
Priority: high | Milestone: R1.1
Component: System/Kernel | Version: R1/Development
Resolution: | Keywords:
Blocked By: 6213 | Blocking:
Platform: All |
------------------------------+-----------------------------
Comment (by pulkomandy):
So, after some research, it seems we need to rework our PCI bus detection
and initialization quite a bit.
Currently, we find the PCI configuration space by looking at the MCFG ACPI
table. This only gives us the address of the configuration space, where we
can access the BAR for the PCI devices on the bus.
But the info we need is in the DSDT table, in ACPI nodes with
PNP0A03/PNP0A08 cid/hid. Conveniently, ACPICA already detects these and
sets the ACPI_PCI_ROOT_BRIDGE flag for us.
We are supposed to find that first, and get the segment and bus numbers
from there (_BBN and _SEG methods). From these, we can lookup the
corresponding base address in the MCFG. But in addition, we also get the
_CRS method, which gives us information about the address range allocated
to this PCI bus. Once we know that, we can see which parts of this space
are already allocated to devices, and finally use the remaining space to
assign addresses to the devices that don't yet have one.
--
Ticket URL: <https://dev.haiku-os.org/ticket/3#comment:11>
Haiku <https://dev.haiku-os.org>
The Haiku operating system.
