ARMX6 is my everyday RISC_OS workhorse now: fast, small, silent. Raspberry
Pi however remains a serious contender in hardware extensibility: lots of
GPIO ready-for-use, and well documented, whereas ARMX6 hides these
treasures.
Out of reach, hardly visible, poorly documented.. But they're certainly
there! Next to the battery clock extension on the ARMX6 main board you'll
find 13 GPIO's on ini-mini connector JP4.
JP4 can be applied in 2 independantly powered GPIO rows: 8 on even
numbered pins, 5 on odd numbered pins (also switchable to SPI).
You'll face 2 problems in putting these GPIOs to good use:
(a) Prepare a cable with a tiny (1.27mm grid!) 2x10pin connector, likely
handmade. (I only managed 1x10 but that's ok: you can easely switch rows).
(b) Find out how each JP4-pin is interfaced with the processor. Much, much
more effort than constructing the connector, as relevant internet
documentation often is unprecise/ambiguous/faulty. And the iMX Processor
Reference Manual is 5833 pages wide.. (Want to try? Look for IMX6DQRM.PDF).
Anyway, these are my findings. Could save you another weekend's research,
so copy and store..
(I'm not sure this monospaced table will transpose readable:)
even_JP4 BANK_BIT ALT IOMUX IOBANK __odd___even_
4__d1 3__11 5 &E0140 &A4000 +| 1 | 2 |+
6__d2 3__27 5 &E00C0 &A4000 +| 3 | 4 | d1
8__d3 6__31 5 &E0158 &B0000 +| 5 | 6 | d2
10__d4 1__24 5 &E01D8 &9C000 d10 mosi 7 | 8 | d3
12__d5 7__08 5 &E02D0 &B4000 d11 miso 9 | 10 | d4
14__d6 3__26 5 &E00BC &A4000 d12 clk 11 | 12 | d5
16__d7 3__08 5 &E0134 &A4000 d13 ss0 13 | 14 | d6
18__d8 4__05 5 &E0254 &A8000 d14 ss1 15 | 16 | d7
-| 17 | 18 | d8
-|__19__|__20__|-
odd_JP4 BANK_BIT ALT IOMUX IOBANK odd_ALT SPI SPIBANK
7__d10 3__18 5 &E0098 &A4000 1 mosi &08004
9__d11 3__17 5 &E0094 &A4000 1 miso &08000
11__d12 3__16 5 &E0090 &A4000 1 clk &08008
13__d13 2__30 5 &E008C &A0000 1 ss0
15__d14 4__10 5 &E0208 &A8000 0 ss1
- JP4 power pins: even 2=5V and 10=GND / odd 1,3,5=5V and 17,19=GND.
- Use power pins for 3-to-5 volt I/O buffering as all JP4 pins are 3V3.
- BANK number: 1 out of 7 gpio-banks (each 32bit wide)
- BIT: position of this gpio on 32bits row of BANK (use as mask!)
- IOBANK is the memory-mapped BANK address
- ALT number indicates the (alternative) route between JP4 and BIT.
- IOMUX: address where any ALT-choice (for this JP4-pin) is changed/stored.
I/O hardware is out of reach from regular memory space, so first of all
remapping to a virtual addressbase is needed. Any address from the above
table should then be added to this virtual base. This results in the
actual address to act on. But this you knew of course.
I wrote a small JP4-testing tool. As some assembly was needed I used
BBC-BASIC, duly apologising for this outdated un-C-like approach.
Nevertheless, feel free to ask for it if you're interested.
Paul Porcelijn
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