[SI-LIST] why "error: not increasing in time" in hspice?

  • From: Joel Amzallag <loeljem@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Tue, 27 May 2008 14:45:04 -0700 (PDT)

The SI list is not the hotline for vendors tools.
Call Synopsys.
Joel.

--- On Mon, 5/26/08, FreeLists Mailing List Manager 
&lt;ecartis@xxxxxxxxxxxxx&gt; wrote:
From: FreeLists Mailing List Manager &lt;ecartis@xxxxxxxxxxxxx&gt;
Subject: si-list Digest V8 #168
To: "si-list digest users" &lt;ecartis@xxxxxxxxxxxxx&gt;
Date: Monday, May 26, 2008, 11:14 PM

si-list Digest  Tue, 27 May 2008        Volume: 08  Issue: 168

In This Issue:
        #1:     From: jideguzi &lt;jideguzi@xxxxxxx&gt;
                Subject: [SI-LIST] why "error: not increasing in time" in 
hspice?

----------------------------------------------------------------------

Msg: #1 in digest
Date: Tue, 27 May 2008 12:42:32 +0800 (CST)
From: jideguzi &lt;jideguzi@xxxxxxx&gt;
Subject: [SI-LIST] why "error: not increasing in time" in hspice?

 hi all
 
 I created a PWL source in my main circuit but when I run the netlist with
hspice, it gives me error: **error** piecewise source        0:vdh             
not increasing in time
I have tried many ways to modified it, but failed!
is there anybody meet the same problem like that? who can tell me where I am
making a mistake?
 
 
my netlist codes:
 .tran 0.001n 18n UIC sweep DATA=INPUT_RAMP
options autostop accurat runlvl
ic v(dh)=vdd 
........
param ckramp_l='9n-ckramp/2*1.25'
param ckramp_r='9n+ckramp/2*1.25'
param inramp_l='mid-inramp/2*1.25'
param inramp_r='mid+inramp/2*1.25'
.......
 
vsel sel 0 pwl (0n vdd 'ckramp_l' vdd 'ckramp_r' 0 13n 0)
vdh dh 0 pwl (0n vdd 'inramp_l' vdd 'inramp_r' 0 13n 0)
 
DATA INPUT_RAMP
        inramp  ckramp  mid
        0.015n  0.015n  13n
        0.015n  0.015n  9n
        0.015n  0.015n  5n
ENDDATA
 
 


------------------------------

End of si-list Digest V8 #168
*****************************


      

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