Hi
For this kind of problems it's better to contact your local CST application
engineer for technical support.
You can send them your model and they can check the overall setup.
Without looking at your model it's very hard for us to figure out what
could be wrong.
Thanks
Cristian
On Wed, Dec 30, 2015, 7:06 AM Aramareddy Sreekanth reddy <
aramareddy.s@xxxxxxx> wrote:
Hi Experts,
I am facing a problem, could you please help me
We have high speed pair of differential line, travelling in the inner
layer from FPGA BGA to SFP connector.
I was trying to simulate in frequency domain to get the channel
characteristics using the tool CST tool, we have cut the differential
section of the traces from the board and started simulating.
Here it is taking too much time for the simulation, its around two days
for one simulation and at the end simulation results were not matching i.e
S11 is almost 0dB.
Topology is given below:
BGA_TX_P----------->SFP_Connector_RX_P
BGA_TX_N----------->SFP_Connector_RX_N
When i am cutting only BGA portion of TX and simulating, the results were
fine i.e S11 is approximately 10dB
When i am taking the entire channel and simulating, S11 comes to be 0dB.
Could you please help me in finding the problem?
Thanks & Regards
Sreekanth
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