[SI-LIST] Re: anlog and digital power plane isolation with ferrite bead good idea?
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "Dong Kim" <kimdongsik_us@xxxxxxxxx>, "steve weir" <weirsi@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 3 Jan 2011 09:44:10 -0800
Dong,
I have attached a PDS design program from Altera. Notice that it does not
include any ferrite beads. same kind of thing is available from Xilinx.
Yes, old applications notes from both Altera an Xilinx said to use ferrite
beads. This was never good advice and has finally been taken from their app
notes, but not before may engineers got conned into using ferrite beads.
Lee
--------------------------------------------------
From: "Dong Kim" <kimdongsik_us@xxxxxxxxx>
Sent: Monday, December 27, 2010 4:03 PM
To: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>; "steve weir"
<weirsi@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
Cc: "Istvan Novak" <istvan.novak@xxxxxxx>; "liuluping 41830"
<liuluping@xxxxxxxxxx>
Subject: [SI-LIST] anlog and digital power plane isolation with ferrite bead
good idea?
> Hi,
>
> My colleague, a PDN engineer, insist he has to use ferrite bead to isolate
> an analog power plane from digital plane for an large FPGA I am using on a
> PCB design.
> I have been trying to convince him it would be better to have good
> decoupling filter by adding inner-plane capacitance and decoupling caps.
>
> But, he is insisting I should prove it either by theory or simulation
> before he can change his mind to remove the isolation ferrite bid and add
> planer cap in my board stack-up. I could not really prove by methodical
> thory nor have time and tool to simulate.
>
> With my shallow knowledge, it will just end with arguing even if he agree
> to do what I tell him to do.
> My knowledge is from my past board design with similar characteristics, I
> did not use the ferrite to isolate the analog and digital power planes.
> It worked fine.
> I also has shown him Lee Ritch's 2nd volume of "Right the first time".
> But, I guess it did not convince him.
>
> Please someone explain why analog and digital power isolation by using may
> be not a good idea.
>
> Please help.
>
> Thanks,
>
> Dong S. Kim
>
>
>
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