[SI-LIST] Re: a problem about PLL bypass
- From: Ed Miguel <emiguel@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 22 Sep 2003 08:47:52 -0500
BH
In a nutshell that is it. If you look closer at datasheets of the caps=20
in question you will see that typically the smaller cap has a much higher=20
series resonance than the larger cap. The series resonance tells you the=
=20
frequency where a cap is no longer a cap but instead has gone=20
inductive. You want the series resonance as far from your frequency of=20
operation as you can practically get (at least 2 or 3 X) By putting both a=
=20
large and a small cap for decoupling you cover the high and low frequency=20
ranges. Make sure the small cap is as close to the chip that you wish to=20
decouple since the trace inductance will also contribute to lower the=20
series resonance. The larger cap is not as sensitive.
EM
At 03:55 PM 9/22/03 +0800, =3D?gb2312?q?Bi=3D20Han?=3D wrote:
>May I ask a question that why need two caps in parallel to decoupling?
>
>Is the root cause that big caps's ESR/ESL too large to decouple high=20
>frequence signal? So need a small cap to serve for high-freq use?
>
>Thanks!
>
>BH
>steve weir <weirsp@xxxxxxxxxx> wrote:
>
>Yehuday, Sean,
>
>I disagree. I doubt that the VCO won't start. I believe the loop is not
>locking.
>
>The LC filter is flat well into the MHz, whereas these types of PLL's are
>typically sensitive to noise from 10 KHz up to several MHz. The other
>danger of an LC network that has been mentioned here before is that with
>the light load of the PLL, the bead may have a substantial Q making a nice
>resonant tank out of the LC network.
>
>Regards,
>
>At 09:41 AM 3/31/2003 +0300, Yehuda Yizraeli wrote:
>
> >Hi Sean Lu,
> >
> >The resistor cause phase shift from zero frequency while the ferrite bead=
is
> >high frequency element. While trying to boot, the power supply inject
> >antiphase voltage spikes into the oscillator and it stops. The use of the
> >resistor cause the phase shift (at any frequency!!), thus moving the=
startup
> >and the stop noise from each-other.
> >
> >Hope it helps.
> >
> >BTW, checking oscillator current should demonstrate very low power which
> >means no drastic IR on it.
> >
> >
> >Regards, yehuda
> >
> >
> >
> >
> >
> >-----Original Message-----
> >From: lu Haizhao [mailto:luhaizhao@xxxxxxxxxx]
> >Sent: Monday, March 31, 2003 9:31 AM
> >To: si-list@xxxxxxxxxxxxx
> >Subject: [SI-LIST] a problem about PLL bypass
> >
> >
> >
> >Hi,all
> >
> > In the Motolola's telecom controller XPC8260-200MHz's handbook,the PLL
> >bypass circuit is the following:
> >
> > VDD _____
> > -------------|____|-----------------------VCCSYN
> > R | |
> > ___ ___
> > ___ 10uF ___ 0.1uF
> > | |
> > |____________|
> > |
> > |
> > GND
> >
> > the R is 10 Ohm.
> > In the board,I use a ferrite bead instead of a resistance.This ferrite
> >bead has a resistance of 0.01 Ohm in steady current,and 60 Ohm in 100MHz.
> > the problem is when the board is under -5=3DA1=3DE6 to =3D
> >-30=3DA1=3DE6=3DA3=3DACsometime the 8260 can not boot up normally or can=
not boot
> >up.and if you use a resistance,not a ferrite bead,the problem will
> >disappear.
> > Can someone tell me the cause? Thanks!
> >
> >Regards,
> >
> >Sean Lu
> >Huawei Technologies co.,Ltd=3D20
> >Shenzhen China=3D20
> >
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