[SI-LIST] Re: Xilinx IBERT Testing

Steve,

Thanks for your very thorough reply.  It gives me a lot of things to 
look at.  One thing that I noticed in getting to this point is that 
adding any pre/post-emphasis increases the BER.  To me that indicates 
that channel loss would seem less likely to be an issue.  Would you agree?

Chris

On 7/15/2011 1:19 AM, steve weir wrote:
> Chris, the maximum run lengths of a given PRBSn pattern are:  n 1's, and
> n-1 0's.  Failure of PRBS15/23/31 indicates that you have frequency
> dependent distortions.  Those could be coming from your channel, or from
> your PDN.  An brief list of things I would check first:
>
> 1. Tx eye quality.  This will tell you if the problem is excessive
> distortion and/or attenuation in the channel.
> If the Tx eye looks good then you will need to look at  the channel
>
> 1.S parameters on the channel from VNA or TDT measurements
> 2. Preemphasis settings for the transmitter
> 3. Equalization settings for the receiver
> 4. AC coupling capacitor values and termination arrangement
>
> If the Tx eye is poor then you will need to look at the PDN and the
> reference clock.
>
> PDN
> 1. Tx driver PDN Z vs F
> 2. PLL PDN Z vs F
>
> Reference clock
> 1. Reference oscillator stability
>
> Steve
> On 7/14/2011 9:53 PM, Chris Johnson wrote:
>> I am debugging a board with a Virtex-6 HX380 chip and having some issues
>> with getting low error rates using the Xilinx IBERT tool.  I can tweak
>> the MGTH parameters to have zero or near-zero errors for a PRBS7
>> pattern, but not for longer patterns, such as PRBS15/23/31.  Is there a
>> particular design flaw that is more likely to cause pattern sensitive
>> failure for longer PRBS patterns, or could it be just about anything?
>> The links are running at 10.3125 Gbps.
>>
>> Thanks,
>> Chris
>>
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