[SI-LIST] Re: Transmsision lines
- From: Bi Han <mike_bihan@xxxxxxxxxxxx>
- To: lalexman@xxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Sat, 15 Oct 2005 18:46:30 -0700 (PDT)
Leonard:
I used to wonder the same question several months ago. I got one way to
persuade myself. Reading two replies already given, math is inevitably used to
explain this question.
However, there could be another way to explain this question.
Transmission line could be understood as cascade of stages L and C. Signal
transmission could be understood as energy exchange between cascaded L and C.
Signal energy will change from current stored in inductor and voltage stored in
capacitor.
Think a step response. Along the cascaded L-C stages, voltage stored in the
capacitor will stay in V-step after the signal propagate through local stage.
Energy will be sent into next stage in the form of current.
If last stage is open, thus sent energy will be translate into voltage finally.
Compared with previous terminated stages, this stage's voltage stored on the
capacitor should be higher.
If explannation stops here, it is correct. But it did not answer How much
higher could be? ( after that, the monkey will climb the tree )
One possible explaination is given as reference.
Let's compare the last stage with previous stages. Previous stage's capacitor
will store V-step after inductor's voltage bias is zero. After then, all
current through ind-1 will be equal to current through ind2. Voltage accross
cap1 stays constant. After cap2 is charged, ind1 ind2's current will be DC.
Now, think there is no ind2. All AC energy stored is just enough to charge cap2
into V-step, thus charge cap1 as 2xV-step.
-------ind-1--------ind2-----
| |
cap1 cap2
| |
We see the voltage boost 2x as reflection.
I know the part on 2x amplitude is a little bit fuzzy. (That kind of fuzzy is
what I often see in SI books.) But I think it helps understand the reflection.
thanks,
Han
Leonard Alexman <lalexman@xxxxxxxxxxx> wrote:
Hi,
I am trying to figure out transmission lines and reflections and trying to
understand why if the load is open or a high resistance the voltage that
arrives at the load is doubled and the signal is them reflected back to the
source. I understand there is an impedance mismatch but in all the articles
I have found not explains in basic terms wht the voltage doubles and
reflects back down the line. Can anyone point me to an article that might
explain this in basic terms ?
TIA
Leonard Alexman
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- References:
- [SI-LIST] Transmsision lines
- From: Leonard Alexman
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- » [SI-LIST] Re: Transmsision lines
- [SI-LIST] Transmsision lines
- From: Leonard Alexman