[SI-LIST] Solder migration during RFIC testing
- From: noneza@xxxxxxxxxxxxxxx
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 24 Feb 2003 17:18:54 +0800
Hi ,
Not sure if this would be of interest to you. If not , hope you could refer
me to a mail list that tackles this problem.
RF devices packaged with soldered leads (QFP, SOP etc.) causes solders to
stick onto the test socket with gold plated pins. I've known that this is
worse at high temp exposures. It is surprising to see that it is causing SI
problem and test failures even at room temp. Cleaning the test sockets
every now and then does not help much.
Would appreciate it if you recommend any solutions to prevent or minimise
this solder migration problem.
Thanks in advance.
Arvin
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