[SI-LIST] Signal Routing in outer layer
- From: "bijesh.t.b" <bijesh.t@xxxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 19 Oct 2004 15:29:50 +0500 (GMT+0500)
Hi all,
I would like to get some clarification reg. the high speed differential
signal routing in multilayer board.
1).Can we route high speed differential signal in outer layer?.
2).If we can route the differential signal in outer layer then, how do we
calculate the impedence.
3).What is the minimum tolereance which we can give for the outer layer
impedece.
4).If the high speed differential signal can be routed in the outer layer
then,how do we control the EMI issues?.
If anyone of you can help me on this,Please..
Thank you
Bijesh
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