[SI-LIST] Signal Routing in outer layer

Hi all,
I would like to get some clarification reg. the high speed differential  
signal routing in multilayer board.

1).Can we route  high speed differential signal in outer layer?.
2).If we can route the differential signal in outer layer then, how do we
calculate the impedence.
3).What is the minimum tolereance which we can give for the outer layer
impedece.
4).If the high speed differential signal can be routed in the outer layer
then,how do we control the EMI issues?.

If anyone of you can help me on this,Please..

Thank you
Bijesh


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl?Si-List_FAQ

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu

Other related posts: