[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- From: "Schimmel Fred-MGI2080" <fschimmel@xxxxxxxxxxxx>
- To: <John.Hill@xxxxxxxxxx>, <Cclewell@xxxxxxxxxxxxx>, <nrpatel@xxxxxxxxxxx>
- Date: Thu, 31 Aug 2006 17:55:50 -0400
John,
There is an updated spec on the jedec website which corrects the Vih(ac)
& Vil(AC) to 0.31v. (apparently this is the intended value, and the spec
you viewed had some production issues)
See http://www.jedec.org/download/search/jesd8-9b.pdf
Fred
-----Original Message-----
BTW, the book identifies Vih(ac) and Vil(ac) at 0.31, but the
specification has 0.35. Is this an old specification?
http://download.micron.com/pdf/misc/sstl_2spec.pdf#search=3D3D%22sstl_2%2=
2
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- References:
- [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- From: Hill, John
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- » [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- » [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- » [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- » [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- » [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- » [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- [SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- From: Hill, John