Kumar, As far as I understand, an analog only macro model will never be able to compete with a mixed signal (*-AMS) model if you make use of the full digital capabilities of the AMS language. Arpad ---------------------------------------------------------- ________________________________ From: C. Kumar [mailto:kumarchi@xxxxxxxxx] Sent: Thursday, May 26, 2005 11:20 AM To: Muranyi, Arpad; si-list@xxxxxxxxxxxxx Subject: Re: [SI-LIST] Re: SI models at MGH speeds You can always generate an accurate macromodel given enough time and resources. The language you implement is irrelevent. The fundamental thing you have to understand is the circuit architecture. Once you know that, you can certainly construct a macromodel for that particular architecture with adjustable parameters. The parameters can then be tuned to accurately reflect the actual device. The macromodels can be very efficient because they are not constrained by particular implementation as the layout driven models are and are very compact. Unfortunately since most vendors give you just a layout derived model. If you are planning to do a lot of simulations then it is worth your time to generate a macromodel. Ypu can download templates for some important circuit architectures from http://register.cadence.com/register.nsf/macromodeling?openform You should also contact your local Cadence AE . "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx> wrote: Sunil, There could be various reasons for not being able to generate "accurate" IBIS models for higher frequencies but it is not the IV curves. IV curves basically contain the DC characteristics of the buffer, which are easy to model accurately. 1) One group of inaccuracies could be the so-called second (or higher) order effects in the buffer, which may be non linear, frequency dependent, voltage dependent, etc... One such example would be the C_comp. In IBIS it is a constant for all voltages and frequencies, but in reality it is not. 2) The other group of reasons revolves around the circuit design (structure) of the high speed buffers. We have pre-emphasis and similar fancy buffer designs now, which can get tricky to model in IBIS simply because of the rigid assumptions IBIS keywords make about the buffer's inter! nal circuitry. There are keywords which allow some room for working with such buffers, for example you can use the [Driver Schedule] keyword for a pre-emphasis=20 buffer, but you may not be able to do everything well. The *-AMS language extensions were added to the IBIS specification to remove this rigidity from the specification. Cadence's macro modeling suggestions can help this second situation, because with some additional controlled sources and behavioral elements you can overcome some of these rigid assumptions built into the IBIS specification without having to go to SPICE models. But since their macro models are built around the basic IBIS IV/Vt engine and/or predefined controlled sources and delays, there are limits on how far you can go with it when you compare this technique with the *-AMS capabilities. On the other hand, the reason people turn to encrypted SPICE models is simply because they do not have the tim! e (or don't want to take the time) to figure out how to make behavioral models. If IBIS models were hard enough to make, writing macro models and *-AMS models are even harder. However, SPICE may not be the solution either. For one, it is slow, but I also hear issues with its accuracy (contrary to the popular belief that it is accurate). You just need to know what you need, and what you are getting in these models. Unfortunately there are no black and white answers, and no free lunches either... Arpad Muranyi Intel Corporation --------------------------------------------------------------- -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] = On Behalf Of sunil.mekad@xxxxxxxxx Sent: Wednesday, May 25, 2005 9:06 PM To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] SI models at MGH speeds Hi, Can anyone tell me why it is difficult to generate IBIS models for mutli-giga hz devices. Most of the vendors give us HSPICE models. Is it something to do with difficulty in accurate characterisation of V/I curve at such high frequencies (>5GHz)? In any case are HSPICE models also the correct solution? Presuming such interfaces also have pre-emphasis and de-emphasis. Cadence suggests the use of macromodels for MGH applications however, is it possible to convert HSPICE models to accurate macromodels for simulation in SPECCTRAQUEST for >5GHz application? Thanks Sunil ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! 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