[SI-LIST] Re: SI Simulation post layout
- From: Ralf Bruening <ralf.bruening@xxxxxxxx>
- To: "Nitin Sood" <Nitin.Sood@xxxxxxx>
- Date: Wed, 6 Oct 2004 23:20:26 +0200
Hello Nitin,
first of all I have to complete the vendor 'jump into the
game' round and mention that there are of course as well
Post-Layout SI tools from Zuken (Hot-Stage, Cadstar SI Verify)
which do the job you are looking for very well proven by many
customers - but let me express as well my honest opinion
that most of the SI tools I know can do the task
you are asking for - it depends on the PCB tool you are using,
the level of integration in this PCB tool
and the tool vendor support to enable you to do your
tasks as quickly as possible and with shortest
re-simulation loops.
Just my opinion - feel free to contact me directly on further
questions - regards
Ralf Bruening
Wednesday, October 6, 2004, 7:12:46 PM, you wrote:
NS> Hello,
NS> Is there a tool that would allow me to simulate post layout design with
NS> greater flexibility to analyze nets, edit nets and see its effect on the
NS> integrity of the signal?
NS> Hyper-lynx doesn't allow me to cut nets or stubs and see its effect on =
NS> the
NS> signal. Every change intended needs to be incorporated in the layout and =
NS> then
NS> translated into hyper-lynx to be re-simulated.
NS> I appreciate your time and any leads.
NS> Thanks
NS> Nitin Sood.
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_____________________________________________
Ralf Bruening
Product Manager High Speed Design/Partner & Solution Business
Zuken EMC Technology Center
Vattmannstr.3
33100 Paderborn
Germany
Tel: ++49 (0) 5251 150 600 (direct -621)
Fax: ++49 (0) 5251 150 700
Cellular: +49 170 4228512 (alternative: +49 172 9070675)
Email: ralf.bruening@xxxxxxxx
Web: www.zuken.com
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