[SI-LIST] Reflection on Lattice and Bergeron Diagrams
- From: "Abe Riazi" <ARIAZI@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Sat, 4 Aug 2001 11:14:35 -0700
Dear Scholars:
The lattice and Bergeron diagrams offer graphical means for analyzing
waveform alterations caused by multiple reflections on a transmission line.
How and why these techniques are employed in SI analyses constitute the
content of this message. Normally, such graphical procedures are
illustrated with aid of pictures/figures; here I attempt to
describe their prime features using only words and numerical examples
(as no attachments are allowed).
The lattice diagram, also called reflection or bounce diagram,
contains two parallel vertical lines (representing source and load ends of
a transmission line). The horizontal and vertical positions on the
diagram depict distance along the transmission line and the time scale
respectively. The bounce diagram is well suited for examining multiple
transit effects on a lossless line. Such analyses usually involve
calculation of the source (driver) and the load reflection coefficients:
pd = (Zd - Zo)/(Zd + Zo)
pl = (Zl - Zo)/(Zl + Zo)
For purpose of simplicity, the unloaded characteristic impedance Zo is
frequently used in reflection coefficient calculations; although, for
higher accuracy the loaded value Zo' must be employed.
Another frequently used formula:
Vo = Vd * Zo/(Zo + Zd)
Where, Vd is the driver voltage and Vo the initial ( at time = 0 ) Voltage
step at the input port of the line. For instance, when Vd= 5.0
Volts, Zd = 100 Ohms, and Zo = 50 Ohms, then Vo = 1.667 V.
The value of Vo also depends on the driver transition polarity (i.e Low to
High or High to
Low) and the associated Low or High output voltage levels (e.g. VOL or VOH).
Another notable application for above equation arise when Vo, Vd, and Zd
are known (usually via measurements) and Zo requires calculation.
As stated earlier, the distance along the transmission line is depicted by
the horizontal position on the lattice diagram and the time scale by the
vertical position ( increasing time moves downward on diagram). When a
diagonal line, representing a traveling wave, meets the time axis at one
end of the line, a traveling wave is arriving and another is being
reflected. This occurs at times Td, 2Td, 3Td, 4Td, etc. (with Td being input
to output time delay).
The initially launched step Vo travels towards the load end of the line,
arrives at time = Td, gets partly reflected bouncing a wave of amplitude (
Vo * pl )
back towards the driver. Upon arrival ( t=2Td) another partial reflection
sends
a voltage amplitude (Vo * pl * pd ) toward the load. It reaches destination
at t= 3Td,
and a new wave (Vo * pd * pl ^ 2 ) is reflected back arriving driver end
at t=4Td. The process of multiple reflections at each interface continues
until
steady state is achieved.
The driver end line voltage at time t=0 and even multiples of Td (e.g.
t=2Td, 4Td, 6Td, ..., etc.) can be expressed as a function of Vo, pl, and
pd; for instance:
V(t=0) = Vo
V(t=2Td) = Vo * [1 + pl + (pl * pd)]
V(t=4Td) = Vo * [ 1+ pl + (pl * pd) + pd * (pl ^ 2) + (pl * pd)^2]
Inherent in above results is the principle that for lattice diagrams the
total
waveforms at each end of the transmission line is the algebraic sum of
various components at the instant being generated.
Similarly, the voltage at the line's output port can be determined at odd
multiples of Td:
V(t=Td) = Vo * (1 + pl)
V(t=3Td) = Vo * [1 + pl + pl*pd + pd * (pl^2)]
V(t=5Td) = Vo *[1 + pl + pl*pd + pd*(pl^2) + (pl*pd)^2 + (pd^2)*(pl^3)]
The format of these equations differ from formulas I have seen in
literature, because my aim here is to express each driver/receiver voltage
only in terms
of Vo and reflection coefficients. Let pl = 0.999, pd = 0.333 and Vo = 1.667
V, then above relations yield:
Driver port voltage:
V(t=0) = 1.667 V
V(t=2Td) = 3.887V
V(t=4Td) = 4.625 V
V(t=6Td) = 4.807 V
Receiver port:
V(t=Td) = 3.332 V
V(t=3Td) = 4.441 V
V(t=5Td) = 4.809 V
V(t=7Td) = 4.933 V
Above data reveal monotonically increasing
(towards steady state values) "voltage vs. time" step behavior for both the
driver and receiver curves.
The load reflection coefficient pl approaches positive one for very large Zl
(open), equals zero for Zl = Zo (matched load) and pl = -1 for short
termination. Similarly, the driver reflection coefficient pd is bounded by
+1 and -1.
For Zd > Zo ( under-driven line) pd is positive and when Zd < Zo (
over-driven
condition) pd is negative. If pd and pl have identical sign (as in
numerical example discussed earlier) then monotonic
steps result at the driver and receiver line ports; whereas,
pd and pl of opposite signs produce ringing waveforms (for an applied step
voltage).
The lattice diagram allows analyses of reflection effects, but is limited
to linear systems. Another graphical approach, called "target" or "Bergeron"
diagram
goes further by offering V-I plot of the input and output of the driver and
receiver in conjunction with load line.
Bergeron approach is recommended (offering higher
accuracy than lattice diagram)
when non-linear drivers and receivers are present.
In closing, the lattice diagram is suitable for graphical analyses of linear
systems; whereas, Bergeron diagram is applicable to both linear and
non-linear cases. The importance of such manual techniques is also noted in
the "High-Speed Digital System Design a Handbook of Interconnect Theory and
Design
Practices" by S. H. Hall et.al. On page 231 the authors rule that when
designing a high speed digital system to calculate by hand the response of
some
simplified topologies and to ensure calculations match simulation results;
they
support by reason:
"This will provide a huge amount of insight, will significantly help
troubleshoot problems, and will expedite the design process".
I would appreciate your reply to this submittal.
Respectfully,
Abe Riazi
ServerWorks
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