[SI-LIST] Re: Question on SI measurement/validation without r eceiveraccess
- From: Geoff Stokes <gstokes@xxxxxxxxx>
- To: "'zhang_kun@xxxxxxxxxx'" <zhang_kun@xxxxxxxxxx>, arsenault_brian@xxxxxxx
- Date: Thu, 30 Sep 2004 09:45:16 +0100
Zhangkun
You are right I think for a single transmission line which is characterised
and included in the simulation. If there is significant coupling to/from
other lines then a more complex model is required. What tools would you use
for this?
All best wishes
Geoff
> -----Original Message-----
> From: zhangkun 29902 [mailto:zhang_kun@xxxxxxxxxx]
> Sent: 29 September 2004 16:09
> To: arsenault_brian@xxxxxxx
> Cc: 'si-list@xxxxxxxxxxxxx'
> Subject: [SI-LIST] Re: Question on SI measurement/validation without
> receiveraccess
>
>
> Brian
>
> For a transmission line, there should be two equations to
> solve the transmission line. In signal integrity, it is
> problem of 1-dimension which composed of transmission line.
>
> If you could not access the receiver and want to check the
> simulation, I guess voltage at two point should be compared
> between simulation and measurement.
>
> It is only my guess. I hope this is helpful.
>
> Best Regards
>
> Zhangkun
> 2004.9.29
>
> ----- Original Message -----
> From: "arsenault, brian" <arsenault_brian@xxxxxxx>
> Date: Wednesday, September 29, 2004 11:01 pm
> Subject: [SI-LIST] Question on SI measurement/validation
> without receiver access
>
> > Folks...
> >
> > I'm looking for some suggestions and ideas on how to perform SI
> > measurementsand correlate them to simulations when you don't have
> > access to the receiver
> > pin.
> >
> > For example, one of our designs is looking at back-to-back
> > mounting of DDR-2
> > memory chips, and based on the spacing of the board, the vias
> > close to the
> > receivers (the RAM's, when a read operation takes place) will not be
> > accessible. The same thing would apply to probing signals at a
> > receiverthat is using blind and buried vias.
> >
> > Traditionally, all of our technology has utilized only through-
> > vias, and we
> > have been able to probe directly on the pins of the receivers if a
> > via was
> > not located very close by. As we're moving forward, it's apparent
> > that we
> > need to find a better way to both show the designer that his/her
> > design will
> > work, and for the SI group to correlate their simulations to
> > measurements.
> > I'm aware that building a test card to validate the buffers is one
> > way to
> > go, but in these times, we are trying to minimize extra costs.
> >
> > Thanks...
> >
> > Brian
> >
> >
> > Brian Arsenault
> > Principal HW Engineer
> > EMC Corporation
> > Hopkinton, MA
> >
> >
> >
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