Hi all, Currently, I'm working to design a board having 64bit-wide bus interface. It uses 250Mbps HSTL (the clock rate is 250MHz). And the signal path contains two connectors. In other word, it will be shown as follows, Tx --(board trace)--------|connector|--(backplane trace)--|connector|------ (board trace)-- Rx Does anyone have an experience on the above case ? What I want to know is how long the bus signal can usually go when FR-4 PCB is used and the trace width is 6-8mil. Of course, the board will be carefully designed to match the impedance. Any advice will be very helpful for me. Regards, Taesik Cheung ================================== Senior Member of Engineering Staff Switching Technology Team, ETRI 161 Gajong, Yusong, Daejon, 305-350, Korea Tel: +82-42-860-5646 Email: cts@xxxxxxxxxx ================================== ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu