[SI-LIST] [Q] Usual trace length for 64bit-wide bus using 250Mbps HSTL

From: cts@xxxxxxxxxx
To: si-list@xxxxxxxxxxxxx
Date: Fri, 18 Apr 2003 18:10:34 +0900

Hi all,

Currently, I'm working to design a board having 64bit-wide bus interface.
It uses 250Mbps HSTL (the clock rate is 250MHz). And the signal path 
contains two connectors. In other word, it will be shown as follows,

Tx --(board trace)--------|connector|--(backplane trace)--|connector|------
(board trace)-- Rx

Does anyone have an experience on the above case ? What I want to know 
is how long the bus signal can usually go when FR-4 PCB is used and the 
trace width is 6-8mil. Of course, the board will be carefully designed to
match the 
impedance.

Any advice will be very helpful for me.

Regards,
Taesik Cheung

==================================
Senior Member of Engineering Staff
Switching Technology Team, ETRI
161 Gajong, Yusong, Daejon, 305-350, Korea
Tel: +82-42-860-5646
Email: cts@xxxxxxxxxx
==================================



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[SI-LIST] [Q] Usual trace length for 64bit-wide bus using 250Mbps HSTL

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