[SI-LIST] Re: PCI daughter card signal trace length
- From: "Ingraham, Andrew" <Andrew.Ingraham@xxxxxx>
- To: <zanglinyuan@xxxxxxxxxx>
- Date: Mon, 29 Jul 2002 08:51:48 -0400
The clock signal must be the same length on all daughter cards so that
every PCI device receives clock at the same time. If one daughter card
used (say) 0.5 inches and another used 2.5 inches, it would cause a
clock skew between them. So 2.5 inches was chosen, as the length for
all daughter cards to use.
In hindsight, the need for exactly 2.5 inches +/-0.1 inches, especially
at 33MHz, is probably tighter than necessary, but it hardly matters. In
almost all cases it is a simple thing to just make the clock exactly
that long and not question why.
The maximum trace lengths on the other signals is there because most
non-clock signals are bussed on the motherboard, so these traces appear
as "stubs" on the bus. Minimizing their length improves signal
integrity. Since clock is point-to-point, the same considerations do
not apply to it.
Andy
> ----------
> In PCI daughter card,PCI Specification says the 32-bit portion of PCI
> bus must be limited to a maximum trace length 1.5 inches,and the
> 64-bit extension signals must be within 2 inches.
> However the CLK signal must be 2.5inches.
>
> Who knows the exact reason for the length limitations,expecially for
> CLK signal?
>
>
>
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