[SI-LIST] Re: PCI daughter card signal trace length


PCI is a common clock architecture, meaning that it is assumed that clocks
arrive at all devices on the bus simultaneously.  There is an allowable skew
of .5 ns for PCI 33.  The motherboard designer will assume that you have
designed for a 2.5 inch clock as well.  So he knows how long to route his
clock traces to each slot.

The data/address traces should be limited to 1.5 inches, as the motherboard
of the system will have lengths for bus assuming that the card traces will
be no longer than 1.5 inches.  If you design your PCI card in such a
fashion, your trace lengths are PCI compliant.  Most reputable computer
designers will design their motherboards to be PCI compliant as well.  If
you put a PCI compliant card in a PCI compliant motherboard, then there
should not be any signal integrity issues.  Also, many PCI cards are not
impedance controlled.  Therefore, it is advantageous to have short traces
that appear lumped to the rest of the system.  

Hope this helps,
JR

-----Original Message-----
From: zanglinyuan [mailto:zanglinyuan@xxxxxxxxxx]
Sent: Monday, July 29, 2002 1:31 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PCI daughter card signal trace length


Hi.

In PCI daughter card,PCI Specification says the 32-bit portion of PCI bus
must be limited to a maximum trace length 1.5 inches,and the 64-bit
extension signals must be within 2 inches.
However the CLK signal must be 2.5inches.

Who knows the exact reason for the length limitations,expecially for CLK
signal?


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