[SI-LIST] Re: On-die caps for IO supply
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "Chris Cheng" <Chris.Cheng@xxxxxxxx>, "Stephane Tremblay" <strembl1@xxxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Wed, 9 Apr 2008 12:36:20 -0700
NO, I don't know. Perhaps someone involved in designing DDR memory ICs
could comment.
> [Original Message]
> From: Chris Cheng <Chris.Cheng@xxxxxxxx>
> To: <leeritchey@xxxxxxxxxxxxx>; Stephane Tremblay <strembl1@xxxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>
> Date: 4/9/2008 11:53:51 AM
> Subject: [SI-LIST] Re: On-die caps for IO supply
>
> Do you have any idea how large an area 100pf will cost ? Do you have any =
> idea how much yield impact it will do with a 100+ DDR channel I/O ?
>
> -----Original Message-----
> From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]
> Sent: Wednesday, April 09, 2008 11:12 AM
> To: Chris Cheng; Stephane Tremblay; si-list@xxxxxxxxxxxxx
> Subject: RE: [SI-LIST] Re: On-die caps for IO supply
>
>
> A common number I have seen used for 3.3V drivers is 100 pF per I/O. =
> Seems
> to work on many memory die. Simulation would determine if this is good
> enough.
>
>
> > [Original Message]
> > From: Chris Cheng <Chris.Cheng@xxxxxxxx>
> > To: Stephane Tremblay <strembl1@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> > Date: 4/9/2008 10:56:40 AM
> > Subject: [SI-LIST] Re: On-die caps for IO supply =20
> >
> > I don't think you will like my answer but my experience is fill it up =
> =3D
> > with as much capacitor your technology people allow.
> > If you are core limited, you are SOL to begin with.
> > If you are pad limited, just fill the gap between the core and pad =
> area =3D
> > with decoupling cap before the yield police or the core power =3D
> > distribution guy wants to take it for himself.
> > It will take a lot more than "XXX from Si-list recommended this" to =
> grow =3D
> > your die to fit anything more than the above.
> >
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Stephane Tremblay
> > Sent: Wednesday, April 09, 2008 7:33 AM
> > To: si-list@xxxxxxxxxxxxx
> > Cc: 'Stephane Tremblay'
> > Subject: [SI-LIST] On-die caps for IO supply
> >
> >
> > Hi SI-Listers,
> > I am looking for a rule of thumb on the required on-die =3D
> > capacitors needed for proper operation of a given IO (a DDR mem IO in =
> my =3D
> > case). I am looking for a number of "x" capacitance per IO.
> >
> > My IO can be programmed to 18 Ohms of drive and the measured slew-rate =
> =3D
> > is slightly higher than 6 V/ns for both rise and fall. The parasitic =
> =3D
> > capacitance of this IO is about 3.5 pF. The toggle rate could be as =
> high =3D
> > as 2 Gbps so I expect the IO rail to recover within reasonable limits =
> =3D
> > within half a period.
> >
> > I could always start by assuming the current I need just for the =3D
> > transmission line (being a 50 Ohms one):
> >
> > dI/dt =3D3D 6 V/ns / 50 Ohms =3D3D 120 mA / ns (per IO)
> >
> > but this basic current demand calculation neglected the parasitic =3D
> > capacitance of 3.5 pF.
> >
> > Some will say it is also greatly dependant of my power-gnd loop =3D
> > inductance from IO to on-package decaps. On the other end, if my noise =
> =3D
> > spectrum is in the hundreds of MHz, I can't do much at the package =
> level =3D
> > to clean my die supply.
> >
> > So from your experience and knowledge, what would be a good start as =
> a =3D
> > required on-die capacitance required. I want to avoid my on-die IO =
> rail =3D
> > collapsing at a frequency that my package could not keep up.
> >
> > Thanks for the answers,
> > Steph.
> > =3D20
> >
> >
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